ST7FLITE29F2B6 STMicroelectronics, ST7FLITE29F2B6 Datasheet - Page 54
ST7FLITE29F2B6
Manufacturer Part Number
ST7FLITE29F2B6
Description
IC MCU 8BIT 8K FLASH 20DIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST7FLITE20F2B6.pdf
(133 pages)
Specifications of ST7FLITE29F2B6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLITE2x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
15
Number Of Timers
4 bit
Operating Supply Voltage
2.4 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST7FLIT2-COS/COM, ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
13 bit
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE497-5049 - KIT STARTER RAISONANCE ST7FLITE497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-2134-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FLITE29F2B6
Manufacturer:
ST
Quantity:
20 000
ST7LITE2
WATCHDOG TIMER (Cont’d)
11.1.5 Interrupts
None.
11.1.6 Register Description
CONTROL REGISTER (CR)
Read/Write
Reset Value: 0111 1111 (7Fh)
Bit 7 = WDGA Activation bit.
This bit is set by software and only cleared by
hardware after a reset.
Table 13. Watchdog Timer Register Map and Reset Values
54/133
1
WDGA
Address
002Eh
(Hex.)
7
T6
WDGCR
Reset Value
Register
Label
T5
T4
WDGA
T3
7
0
T2
T6
6
1
T1
T0
0
T5
5
1
When WDGA = 1, the watchdog can generate a
reset.
0: Watchdog disabled
1: Watchdog enabled
Note: This bit is not used if the hardware watch-
dog option is enabled by option byte.
Bits 6:0 = T[6:0] 7-bit timer (MSB to LSB).
These bits contain the decremented value. A reset
is produced when it rolls over from 40h to 3Fh (T6
becomes cleared).
T4
4
1
T3
3
1
T2
2
1
T1
1
1
T0
0
1