STM32F102C6T6A STMicroelectronics, STM32F102C6T6A Datasheet - Page 52

• Manufacturer Part Number: STM32F102C6T6A
• Description: MCU ARM 32BIT 32KB FLASH 48-LQFP
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F102C6T6A

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 48MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: DMA, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: STM32F102x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: I2C/SPI/USART/USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 12-bit
• For Use With: 497-10030 - STARTER KIT FOR STM32497-8853 - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL - KIT IAR KICKSTART STM32 CORTEXM3497-8512 - KIT STARTER FOR STM32F10XE MCU497-8505 - KIT STARTER FOR STM32F10XE MCU497-8304 - KIT STM32 MOTOR DRIVER BLDC497-6438 - BOARD EVALUTION FOR STM32 512K497-6289 - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U - BOARD EVAL MCBSTM32 + ULINK2497-6053 - KIT STARTER FOR STM32497-6052 - KIT STARTER FOR STM32497-6050 - KIT STARTER FOR STM32497-6049 - KIT EVALUATION LOW COST STM32497-6048 - BOARD EVALUATION FOR STM32497-6047 - KIT DEVELOPMENT FOR STM32497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-8306

Electrical characteristics
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Table 38.
1. Values guaranteed by design, not tested in production.
2. f
3. The maximum hold time of the Start condition has only to be met if the interface does not stretch the low
4. The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the
t
w(STO:STA)
Symbol
t
t
t
t
t
w(SCLH)
t
w(SCLL)
t
su(SDA)
t
t
t
su(STO)
t
su(STA)
h(SDA)
higher than 4 MHz to achieve the maximum fast mode I
period of SCL signal.
undefined region of the falling edge of SCL.
h(STA)
r(SDA)
r(SCL)
f(SDA)
f(SCL)
PCLK1
C
b
must be higher than 2 MHz to achieve the maximum standard mode I
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
Start condition hold time
Repeated Start condition setup
time
Stop condition setup time
Stop to Start condition time (bus
free)
Capacitive load for each bus line
I
2
C characteristics
Parameter
Doc ID 15057 Rev 3
Standard mode I
2
Min
250
0
4.7
4.0
4.0
4.7
4.0
4.7
C frequency.
(3)
1000
Max
300
400
STM32F102x4, STM32F102x6
2
C
(1)
2
C frequency. It must be
Fast mode I
20+0.1C
Min
100
0
1.3
0.6
0.6
0.6
1.3
0.6
(4)
b
2
900
Max
C
300
300
400
(1)(2)
(3)
Unit
pF
µs
ns
µs
µs
µs