Z8F6422VS020SG Zilog, Z8F6422VS020SG Datasheet - Page 110
Z8F6422VS020SG
Manufacturer Part Number
Z8F6422VS020SG
Description
IC ENCORE MCU FLASH 64K 68PLCC
Manufacturer
Zilog
Series
Encore!® XP®r
Specifications of Z8F6422VS020SG
Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
68-LCC (J-Lead)
Processor Series
Z8F642x
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Number Of Timers
4
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z8F64200100KITG, Z8F64230100ZDF, ZENETSC0100ZACG, ZUSBOPTSC01ZACG, ZUSBSC00100ZACG, Z8F64210100ZDA, Z8F64210100ZDP, Z8F64210100ZDV, Z8F64220100ZDA, Z8F64220100ZDV, Z8F6422AR00ZEM, Z8F6422VS00ZEM, Z8F6421AN00ZEM
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1002 - ISP 4PORT ZILOG Z8 ENCORE! MCU269-4678 - KIT DEV FOR Z8F642 MCU 44 PIN269-4677 - KIT DEV FOR Z8F642 MCU 28PIN269-4643 - KIT DEV Z8 ENCORE XP 28-PIN269-4630 - DEV KIT FOR Z8 ENCORE 8K/4K269-4629 - KIT DEV Z8 ENCORE XP 28-PIN269-4628 - KIT DEV Z8 ENCORE XP 8-PIN269-4540 - KIT DEV FOR Z8 ENCORE 16K TO 64K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
269-4285
Z8F6422VS020SG
Z8F6422VS020SG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8F6422VS020SG
Manufacturer:
Zilog
Quantity:
83
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Part Number:
Z8F6422VS020SG
Manufacturer:
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Table 48. Watchdog Timer Control Register (WDTCTL)
Watchdog Timer Control Register Definitions
PS019921-0308
BITS
FIELD
RESET
R/W
ADDR
Watchdog Timer Control Register
POR
7
2. Write
3. Write the Watchdog Timer Reload Upper Byte register (WDTU).
4. Write the Watchdog Timer Reload High Byte register (WDTH).
5. Write the Watchdog Timer Reload Low Byte register (WDTL).
All steps of the Watchdog Timer Reload Unlock sequence must be written in the order just
listed. There must be no other register writes between each of these operations. If a regis-
ter write occurs, the lock state machine resets and no further writes can occur, unless the
sequence is restarted. The value in the Watchdog Timer Reload registers is loaded into the
counter when the Watchdog Timer is first enabled and every time a WDT instruction is
executed.
The Watchdog Timer Control (WDTCTL) register
indicates the source of the most recent Reset event, indicates a Stop Mode Recovery event,
and indicates a Watchdog Timer time-out. Reading this register resets the upper four bits
to 0.
Writing the
ter address unlocks the three Watchdog Timer Reload Byte registers (WDTU, WDTH, and
WDTL) to allow changes to the time-out period. These write operations to the WDTCTL
register address produce no effect on the bits in the WDTCTL register. The locking mech-
anism prevents spurious writes to the Reload registers.
See descriptions below
STOP
AAH
6
55H
to the Watchdog Timer Control register (WDTCTL).
,
AAH
WDT
unlock sequence to the Watchdog Timer Control (WDTCTL) regis-
5
EXT
4
FF0H
R
3
(Table
Z8 Encore! XP
Reserved
48) is a Read-Only register that
2
0
Product Specification
1
®
F64XX Series
Watchdog Timer
SM
0
96
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