STM32F103RBT6 STMicroelectronics, STM32F103RBT6 Datasheet - Page 12
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STM32F103RBT6
Manufacturer Part Number
STM32F103RBT6
Description
MCU ARM 128KB FLASH MEM 64-LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32F103R8T6.pdf
(96 pages)
Specifications of STM32F103RBT6
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
72MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
Number Of I /o
51
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
STM32F103x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
20 KB
Interface Type
CAN/I2C/SPI/USART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
51
Number Of Timers
4
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWARM, EWARM-BL, KSDK-STM32-PLUS, KSK-STM32-JL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ST-LINK
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (16-ch x 12-bit)
Cpu Family
STM32
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
72MHz
Total Internal Ram Size
20KB
# I/os (max)
51
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
2V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
64
Package Type
LQFP
For Use With
497-10841 - INTERFACE BOARD BASED ON STM32X497-10048 - BOARD EVAL ACCELEROMETER497-10030 - STARTER KIT FOR STM32497-8853 - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL - KIT IAR KICKSTART STM32 CORTEXM3497-8512 - KIT STARTER FOR STM32F10XE MCU497-8511 - KIT STARTER FOR STM32 512K FLASH497-8505 - KIT STARTER FOR STM32F10XE MCU497-8418 - BOARD DEMO DGTL PHOTOFRAME STM32497-8304 - KIT STM32 MOTOR DRIVER BLDC497-6438 - BOARD EVALUTION FOR STM32 512K497-6289 - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U - BOARD EVAL MCBSTM32 + ULINK2MCBSTM32 - BOARD EVAL FOR STM STM32X SER497-6053 - KIT STARTER FOR STM32497-6052 - KIT STARTER FOR STM32497-6050 - KIT STARTER FOR STM32497-6049 - KIT EVALUATION LOW COST STM32497-6048 - BOARD EVALUATION FOR STM32497-6047 - KIT DEVELOPMENT FOR STM32497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-6066
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STM32F103RBT6
Manufacturer:
STMicroelectronics
Quantity:
4 750
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STM32F103RBT6
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
STM32F103RBT6
Manufacturer:
ST
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20 000
Company:
Part Number:
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Manufacturer:
DELTA
Quantity:
1 000
Company:
Part Number:
STM32F103RBT6TR
Manufacturer:
ST
Quantity:
20
Description
12/96
Figure 2.
1. When the HSI is used as a PLL clock input, the maximum system clock frequency that can be achieved is
2. For the USB function to be available, both HSE and PLL must be enabled, with USBCLK running at 48
3. To have an ADC conversion time of 1 µs, APB2 must be at 14 MHz, 28 MHz or 56 MHz.
64 MHz.
MHz.
OSC32_OUT
OSC32_IN
OSC_OUT
OSC_IN
MCO
Clock tree
32.768 kHz
4-16 MHz
Main
Clock Output
HSE OSC
LSE OSC
HSI RC
8 MHz
LSI RC
40 kHz
PLLSRC
MCO
x2, x3, x4
PLLMUL
HSI
..., x16
PLLXTPRE
PLL
/2
/128
LSE
/2
LSI
RTCSEL[1:0]
Doc ID 13587 Rev 12
/2
HSE
SYSCLK
PLLCLK
HSI
PLLCLK
RTCCLK
to Independent Watchdog (IWDG)
HSI
HSE
CSS
SW
SYSCLK
72 MHz
to RTC
max
IWDGCLK
Prescaler
/1, 2..512
AHB
Prescaler
/1, 1.5
USB
TIM1 timer
If (APB2 prescaler =1) x1
else
/1, 2, 4, 8, 16
/1, 2, 4, 8, 16
TIM2,3, 4
If (APB1 prescaler =1) x1
else
/8
Prescaler
Prescaler
72 MHz max
APB1
APB2
STM32F103x8, STM32F103xB
Prescaler
/2, 4, 6, 8
Clock
Enable (3 bits)
ADC
48 MHz
Legend:
HSE = high-speed external clock signal
HSI = high-speed internal clock signal
LSI = low-speed internal clock signal
LSE = low-speed external clock signal
72 MHz max
36 MHz max
ADCCLK
Peripheral Clock
Peripheral Clock
Enable (13 bits)
Enable (11 bits)
x2
USBCLK
to USB interface
x2
HCLK
to AHB bus, core,
memory and DMA
FCLK Cortex
free running clock
to Cortex System timer
Peripheral Clock
Enable (1 bit)
Peripheral Clock
Enable (3 bits)
TIM1CLK
TIMXCLK
PCLK1
PCLK2
to APB1
peripherals
to APB2
peripherals
to TIM2, 3
and 4
to ADC
to TIM1
ai14903