EZ80F91NA050EG Zilog, EZ80F91NA050EG Datasheet - Page 29
![IC ACCLAIM MCU 256KB 144-BGA](/photos/12/15/121558/269-144-bga_sml.jpg)
EZ80F91NA050EG
Manufacturer Part Number
EZ80F91NA050EG
Description
IC ACCLAIM MCU 256KB 144-BGA
Manufacturer
Zilog
Series
eZ80® Acclaim!®r
Specifications of EZ80F91NA050EG
Core Processor
Z8
Core Size
8-Bit
Speed
50MHz
Connectivity
Ethernet, I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
144-LBGA
Processor Series
EZ80F91x
Core
eZ80
Data Bus Width
8 bit
Data Ram Size
16 KB
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
32
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
eZ80F910300ZCOG
Minimum Operating Temperature
- 40 C
For Use With
269-4712 - KIT DEV ENCORE 32 SERIES269-4671 - BOARD ZDOTS SBC Z80ACCLAIM PLUS269-4561 - KIT DEV FOR EZ80F91 W/C-COMPILER269-4560 - KIT DEV FOR EZ80F91 W/C-COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
269-3869
EZ80F91NA050EG
EZ80F91NA050EG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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- Download datasheet (3Mb)
PS019215-0910
Table 2. Pin Identification on the eZ80F91 Device (Continued)
LQFP
Pin No
114
115
116
BGA
Pin No Symbol
A10
B10
E8
PA0
PWM0
OC0
PA1
PWM1
OC1
PA2
PWM2
OC2
Function
GPIO Port A
PWM
Output 0
Output
Compare 0
GPIO Port A
PWM
Output 1
Output
Compare 1
GPIO Port A
PWM
Output 2
Output
Compare 2
Signal Direction Description
Bidirectional
Output
Output
Bidirectional
Output
Output
Bidirectional
Output
Output
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually as
an interrupt input. Each Port A pin,
when programmed as output is
selected to be an open-drain or open-
source output.
This pin is used by Timer 3 for PWM
0. This signal is multiplexed with PA0.
This pin is used by Timer 3 for Output
Compare 0. This signal is multiplexed
with PA0.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually as
an interrupt input. Each Port A pin,
when programmed as output is
selected to be an open-drain or open-
source output.
This pin is used by Timer 3 for PWM
1. This signal is multiplexed with PA1.
This pin is used by Timer 3 for Output
Compare 1. This signal is multiplexed
with PA1.
This pin is used for GPIO. It is
individually programmed as input or
output and is also used individually as
an interrupt input. Each Port A pin,
when programmed as output is
selected to be an open-drain or open-
source output.
This pin is used by Timer 3 for PWM
2. This signal is multiplexed with PA2.
This pin is used by Timer 3 for Output
Compare 2. This signal is multiplexed
with PA2.
Product Specification
Architectural Overview
20
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