C8051T610-GQ Silicon Laboratories Inc, C8051T610-GQ Datasheet - Page 15
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C8051T610-GQ
Manufacturer Part Number
C8051T610-GQ
Description
IC 8051 MCU 16K BYTE-PROG 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051T61xr
Specifications of C8051T610-GQ
Program Memory Type
OTP
Program Memory Size
16KB (16K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
29
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 21x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
29
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051FT610DK
Minimum Operating Temperature
- 40 C
On-chip Adc
21-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1443 - KIT DEV FOR C8051T61X MCU'S
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1435
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051T610-GQ
Manufacturer:
SILICON
Quantity:
31
Company:
Part Number:
C8051T610-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051T610-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051T610-GQR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
1. System Overview
C8051T610/1/2/3/4/5/6/7 devices are fully integrated, mixed-signal, system-on-a-chip MCUs. Highlighted
features are listed below. Refer to Table 2.1 for specific product feature selection and part ordering num-
bers.
With
C8051T610/1/2/3/4/5/6/7 devices are truly stand-alone, system-on-a-chip solutions. User software has
complete control of all peripherals and may individually shut down any or all peripherals for power savings.
Code written for the C8051T610/1/2/3/4/5/6/7 family of processors will run on the C8051F310 Mixed-Sig-
nal ISP Flash microcontroller, providing a quick, cost-effective way to develop code without requiring spe-
cial emulator circuitry. The C8051T610/1/2/3/4/5/6/7 processors include Silicon Laboratories’ 2-Wire C2
Debug and Programming interface, which allows non-intrusive (uses no on-chip resources), full speed, in-
circuit debugging using the production MCU installed in the final application. This debug logic supports
inspection of memory, viewing and modification of special function registers, setting breakpoints, single
stepping, and run and halt commands. All analog and digital peripherals are fully functional while debug-
ging using C2. The two C2 interface pins can be shared with user functions, allowing in-system debugging
without occupying package pins.
Each device is specified for 1.8–3.6 V operation over the industrial temperature range (–45 to +85 °C). An
internal LDO is used to supply the processor core voltage. The Port I/O and RST pins are tolerant of input
signals up to 5 V. See Table 2.1 for ordering information. Block diagrams of the devices in the
C8051T610/1/2/3/4/5/6/7 family are shown in Figure 1.1, Figure 1.2 and Figure 1.3.
High-speed pipelined 8051-compatible microcontroller core (up to 25 MIPS)
In-system, full-speed, non-intrusive debug interface (on-chip)
C8051F310 ISP Flash device is available for quick in-system code development
10-bit 500 ksps Single-ended ADC with analog multiplexer and integrated temperature sensor
Precision calibrated 24.5 MHz internal oscillator
16 k or 8 k of on-chip Byte-Programmable EPROM—(512 bytes are reserved on 16k version)
1280 bytes of on-chip RAM
SMBus/I
Four general-purpose 16-bit timers
Programmable Counter/Timer Array (PCA) with five capture/compare modules and Watchdog Timer function
On-chip Power-On Reset and V
On-chip Voltage Comparators (2)
29/25/21 Port I/O
on-chip
2
C, SPI, and Enhanced UART serial interfaces implemented in hardware
power-on
reset,
DD
Monitor
V
DD
monitor,
Rev 1.0
watchdog
C8051T610/1/2/3/4/5/6/7
timer,
and
clock
oscillator,
the
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