C8051F312-GQ Silicon Laboratories Inc, C8051F312-GQ Datasheet - Page 31
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C8051F312-GQ
Manufacturer Part Number
C8051F312-GQ
Description
IC 8051 MCU 8K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F31xr
Specifications of C8051F312-GQ
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
29
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 21x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
29
Number Of Timers
4 bit
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F310DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 21 Channel
No. Of I/o's
29
Ram Memory Size
1280Byte
Cpu Speed
25MHz
No. Of Timers
4
Rohs Compliant
Yes
Package
32LQFP
Device Core
8051
Family Name
C8051F31x
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1445 - ADAPTER PROGRAM TOOLSTICK F310
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1255
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F312-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F312-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
1.4.
C8051F310/2/4 devices include 29 I/O pins (three byte-wide Ports and one 5-bit-wide Port);
C8051F311/3/5 devices include 25 I/O pins (three byte-wide Ports and one 1-bit-wide Port); C8051F316/7
devices include 21 I/O pins (one byte-wide Port, two 6-bit-wide Ports and one 1-bit-wide Port). The
C8051F31x Ports behave like typical 8051 Ports with a few enhancements. Each Port pin may be config-
ured as an analog input or a digital I/O pin. Pins selected as digital I/Os may additionally be configured for
push-pull or open-drain output. The “weak pullups” that are fixed on typical 8051 devices may be globally
disabled, providing power savings capabilities.
The Digital Crossbar allows mapping of internal digital system resources to Port I/O pins (See Figure 1.13).
On-chip counter/timers, serial buses, HW interrupts, comparator output, and other digital signals in the
controller can be configured to appear on the Port I/O pins specified in the Crossbar Control registers. This
allows the user to select the exact mix of general purpose Port I/O and digital resources needed for the
particular application.
Programmable Digital I/O and Crossbar
Highest
Priority
Lowest
Priority
SYSCLK
Outputs
Outputs
SMBus
UART
T0, T1
P0
P1
P2
P3
PCA
CP0
CP1
SPI
(P0.0-P0.7)
(P1.0-P1.7)
(P2.0-P2.3)
(P2.4-P2.7)
(P3.0-P3.4)
Figure 1.13. Digital Crossbar Diagram
2
4
2
2
2
6
2
8
8
4
4
5
Rev. 1.7
PnSKIP Registers
XBR0, XBR1,
Crossbar
Decoder
Priority
Digital
C8051F310/1/2/3/4/5/6/7
4
4
8
8
PnMDIN Registers
8
5
Notes:
1. P3.1–P3.4 only available on the
C8051F310/2/4.
2. P1.6, P1.7, P2.6, P2.7 only
available on the C8051F310/1/2/3/4/5
PnMDOUT,
Cells
Cells
Cells
Cells
I/O
I/O
I/O
I/O
P0
P1
P2
P3
P0.0
P1.0
P0.7
P1.7
P2.0
P2.7
P3.0
P3.4
31