C8051F352-GQ Silicon Laboratories Inc, C8051F352-GQ Datasheet - Page 73
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C8051F352-GQ
Manufacturer Part Number
C8051F352-GQ
Description
IC 8051 MCU 8K FLASH 32LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F35xr
Specifications of C8051F352-GQ
Program Memory Type
FLASH
Program Memory Size
8KB (8K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x16b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F350DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 16-bit
On-chip Dac
2-ch x 8-bit
No. Of I/o's
17
Ram Memory Size
768Byte
Cpu Speed
50MHz
No. Of Timers
4
Rohs Compliant
Yes
Package
32LQFP
Device Core
8051
Family Name
C8051F35x
Maximum Speed
50 MHz
Data Rom Size
128 B
Height
1.4 mm
Length
7 mm
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Width
7 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1083 - DEV KIT FOR F350/351/352/353
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1272
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7.
There are two voltage reference options for the C8051F350/1/2/3 ADCs: the internal 2.5 V reference volt-
age, or an external reference voltage (see Figure 7.1). The AD0VREF bit in the ADC0CF register selects
the reference source.
The internal voltage reference circuit consists of a 1.25 V, temperature stable bandgap voltage reference
generator and a gain-of-two output buffer amplifier, to produce a 2.5 V voltage reference. When the inter-
nal voltage reference is used, it is driven out on the VREF+ pin. In this configuration, the VREF– must be
connected to the AGND pin external to the device. See Section “24. Revision Specific Behavior’ on
page 227 for more information. The internal voltage reference is enabled by setting the AD0EN bit in regis-
ter ADC0MD to ‘1’ and clearing the AD0VREF bit in register ADC0CF to ‘0’ (See Section “5. 24 or 16-Bit
Analog to Digital Converter (ADC0)’ on page 41). Electrical specifications for the internal voltage reference
and bias generators are given in Table 7.1.
The internal oscillator bias generator is automatically enabled whenever the internal oscillator is enabled.
For power requirement characterization, the BIASE bit in register REF0CN can also be used to enable the
internal oscillator bias generator, when the oscillator itself is not enabled. Likewise, the REFBE bit in regis-
ter REF0CN can be used to enable the internal bandgap generator, which is used by the ADC, the IDACs,
the Clock Multiplier, and the internal Voltage Reference. The internal reference bias generator is automati-
cally enabled whenever a peripheral requires it. See SFR Definition 7.1 for the REF0CN register descrip-
tion.
Reference
(Optional)
External
Voltage
Voltage Reference
(Recommended)
Capacitors
Bypass
+
Figure 7.1. Reference Circuitry Block Diagram
VREF+
VREF–
REFBE
BIASE
AD0VREF
AD0EN
IOSCEN
IDA0EN
IDA1EN
MULEN
AD0EN
Rev. 1.1
VREF to ADC
EN
EN
C8051F350/1/2/3
EN
Bias Generator
Oscillator Bias
Generator
Reference
Reference
Internal
Internal
Buffer
2.5 V
To Internal
Oscillator
To ADC, IDACs,
Clock Multiplier
73