C8051F042-GQ Silicon Laboratories Inc, C8051F042-GQ Datasheet
C8051F042-GQ
Manufacturer Part Number
C8051F042-GQ
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Datasheets
1.C8051F040-TB.pdf
(328 pages)
2.C8051F042-GQ.pdf
(2 pages)
3.C8051F042-GQ.pdf
(16 pages)
Specifications of C8051F042-GQ
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
100-TQFP, 100-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 13x10b; D/A 2x10b, 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F0x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
CAN/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
64
Number Of Timers
5
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F040DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 8-bit or 13-ch x 12-bit
On-chip Dac
2-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1205 - DEV KIT FOR F040/F041/F042/F043
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1207
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F042-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Company:
Part Number:
C8051F042-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Analog Peripherals
10-Bit ADC
-
-
-
-
-
-
High-Voltage Differential Amplifier
-
-
-
8-Bit ADC
-
-
-
Two 12-Bit DACs
Three Comparators
Internal Voltage Reference
Precision V
On-Chip JTAG Debug & Boundary Scan
-
-
-
-
-
Supply Voltage: 2.7 to 3.6 V
-
-
Temperature Range: –40 to +85 °C
CAN 2.0B
±1 LSB INL; guaranteed monotonic
Programmable throughput up to 100 ksps
13 external inputs; programmable as single-ended or differential
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
Data-dependent windowed interrupt generator
Built-in temperature sensor (±3 °C)
60 V common mode input range
Offset adjust from –60 to +60 V
16 gain settings from 0.05 to 16
Programmable throughput up to 500 ksps
8 external inputs; programmable as single-ended or differential
Programmable amplifier gain: 4, 2, 1, 0.5
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
Provides breakpoints, single stepping, watchpoints, stack monitor, pro-
gram trace memory
Inspect/modify memory and registers
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
IEEE1149.1 compliant boundary scan
Typical operating current: 10 mA at 25 MHz
Multiple power saving sleep and shutdown mode
DD
MONEN
HVAIN+
VREFD
HVAIN-
HVREF
HVCAP
XTAL1
XTAL2
VREF0
AIN0.0
AIN0.1
AIN0.2
AIN0.3
DGND
DGND
DGND
AGND
AGND
AGND
Monitor/Brown-out Detector
VREF
DAC1
DAC0
VDD
VDD
VDD
TMS
TDO
AV+
AV+
AV+
TCK
RST
TDI
Oscillator
External
Monitor
Circuit
VDD
HVAMP
Analog Power
Digital Power
M
A
U
X
JTAG
Logic
(12-Bit)
(12-Bit)
VREF
DAC1
DAC0
SENSOR
TEMP
Prog
Gain
25 MIPS, 64 kB Flash, 10-Bit ADC, 100-Pin Mixed-Signal MCU
Boundary Scan
WDT
Debug HW
Oscillator
Internal
2%
100 ksps
(10-Bit)
A
M
U
X
Copyright © 2005 by Silicon Laboratories
ADC
System
Clock
Reset
8:2
C
o
8
0
5
1
e
r
External Data Memory Bus
SFR Bus
CANRAM
256 byte
FLASH
32x136
64 kB
XRAM
RAM
4 kB
High-Speed 8051 µC Core
-
-
-
Memory
-
-
-
CAN Bus 2.0B
-
-
Digital Peripherals
-
-
-
-
-
-
Clock Sources
-
-
Package
-
Ordering Part Numbers
-
-
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
Up to 25 MIPS throughput with 25 MHz system clock
Expanded interrupt handler
4352 bytes data RAM
64 kB Flash; in-system programmable in 512-byte sectors (512 bytes
are reserved)
External parallel data memory interface
32 message objects
”Mailbox" implementation only interrupts CPU when needed
64 port I/O; all are 5 V tolerant
Hardware SMBus™ (I2C™ compatible), SPI™, and two UART serial
ports available concurrently
Programmable 16-bit counter array with 6 capture/compare modules
5 general-purpose 16-bit counter/timers
Dedicated watchdog timer; bidirectional reset
Real-time clock mode using timer 3 or PCA
Internal programmable 2% oscillator: up to 25 MHz
External oscillator: Crystal, RC, C, or Clock
100-pin TQFP (standard lead and lead-free packages
Lead-free package: C8051F042-GQ
Standard package: C8051F042
0,1,2,3,4
SPI Bus
Latches
UART0
UART1
SMBus
Timers
0,1,2,3
CAN
2.0B
PCA
Port
&4
Bus Control
Address [15:0]
Port 4 <from crossbar>
Data [7:0]
CP2
500 ksps
(8-Bit)
ADC
CP1
CP0
C
R
O
B
R
S
S
A
P5 Latch
Addr [7:0]
P6 Latch
Addr [15:8]
P7 Latch
Data Latch
Ctrl Latch
+
-
+
-
Prog
Gain
+
-
Drv
Drv
Drv
Drv
P0
P1
P2
P3
M
A
U
X
C8051F042
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
8:1
DRV
DRV
DRV
DRV
P4
P5
P6
P7
P0.0
P0.7
P1.0/AIN1.0
P1.7/AIN1.7
P2.0/CPx
P2.7/CPx
P3.0/AIN0.6
P3.7/AIN0.7
CTX0
CRX0
VREF2
P4.0
P4.4
P4.5/ALE
P4.6/RD
P4.7/WR
P5.0/A0
P5.7/A7
P6.0/A8
P6.7/A15
P7.0/D0
P7.7/D7
5.5.2005
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C8051F042-GQ Summary of contents
Page 1
... Real-time clock mode using timer 3 or PCA Clock Sources - Internal programmable 2% oscillator MHz - External oscillator: Crystal, RC Clock Package - 100-pin TQFP (standard lead and lead-free packages Ordering Part Numbers - Lead-free package: C8051F042-GQ - Standard package: C8051F042 UART0 8 UART1 SFR Bus SMBus 0 SPI Bus 5 ...
Page 2
... A1 0.05 - 0.15 A2 0.95 1.00 1.05 b 0.17 0.22 0. 16. 14. 0. 16. 14.00 - Copyright © 2005 by Silicon Laboratories C8051F042 TYP MAX UNITS 3 0 µA 0.1 µA 25 MHz 10 bits ±1 LSB ±1 LSB dB 100 ksps V V REF 12 LSB ±1 LSB 10 µs 1.5 µA 4 µs ...