C8051F132-GQ Silicon Laboratories Inc, C8051F132-GQ Datasheet - Page 142

• Manufacturer Part Number: C8051F132-GQ
• Description: IC 8051 MCU 64K FLASH 100TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F13xr

Specifications of C8051F132-GQ

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 100-TQFP, 100-VQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 100MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 64
• Ram Size: 8.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F1x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 8.25 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 64
• Number Of Timers: 5
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F120DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• No. Of I/o's: 64
• Ram Memory Size: 8448Byte
• Cpu Speed: 100MHz
• No. Of Timers: 5
• Rohs Compliant: Yes
• Package: 100TQFP
• Device Core: 8051
• Family Name: C8051F13x
• Maximum Speed: 100 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1234

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
142
Bits7–1: Reserved.
Bit0:
Bits7–0: SFR Page Bits: Byte Represents the SFR Page the C8051 MCU uses when reading or mod-
R/W
R/W
Bit7
Bit7
-
SFRPGEN: SFR Automatic Page Control Enable.
Upon interrupt, the C8051 Core will vector to the specified interrupt service routine and auto-
matically switch the SFR page to the corresponding peripheral or function’s SFR page. This
bit is used to control this autopaging function.
0: SFR Automatic Paging disabled. C8051 core will not automatically change to the appro-
priate SFR page (i.e., the SFR page that contains the SFR’s for the peripheral/function that
was the source of the interrupt).
1: SFR Automatic Paging enabled. Upon interrupt, the C8051 will switch the SFR page to
the page that contains the SFR’s for the peripheral or function that is the source of the inter-
rupt.
ifying SFR’s.
Write: Sets the SFR Page.
Read: Byte is the SFR page the C8051 MCU is using.
When enabled in the SFR Page Control Register (SFRPGCN), the C8051 will automatically
switch to the SFR Page that contains the SFR’s of the corresponding peripheral/function that
caused the interrupt, and return to the previous SFR page upon return from interrupt (unless
SFR Stack was altered before a returning from the interrupt).
SFRPAGE is the top byte of the SFR Page Stack, and push/pop events of this stack are
caused by interrupts (and not by reading/writing to the SFRPAGE register)
R/W
R/W
Bit6
Bit6
-
SFR Definition 11.2. SFRPGCN: SFR Page Control
SFR Definition 11.3. SFRPAGE: SFR Page
R/W
R/W
Bit5
Bit5
-
R/W
R/W
Bit4
Bit4
-
Rev. 1.4
R/W
R/W
Bit3
Bit3
-
R/W
R/W
Bit2
Bit2
-
R/W
R/W
Bit1
Bit1
-
SFR Address:
SFRPGEN 00000001
SFR Address:
SFR Page:
SFR Page:
R/W
Bit0
R/W
Bit0
0x84
All Pages
00000000
Reset Value
0x96
F
Reset Value