PIC12C508-04I/P Microchip Technology, PIC12C508-04I/P Datasheet - Page 51
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PIC12C508-04I/P
Manufacturer Part Number
PIC12C508-04I/P
Description
IC MCU OTP 512X12 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC12C508A-04SM.pdf
(113 pages)
2.PIC12C508A-04SM.pdf
(4 pages)
3.PIC12C508-04P.pdf
(12 pages)
Specifications of PIC12C508-04I/P
Core Size
8-Bit
Program Memory Size
768B (512 x 12)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
25Byte
Cpu Speed
4MHz
No. Of Timers
1
Digital Ic Case Style
DIP
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
25 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
DVMCPA, ICE2000
Minimum Operating Temperature
- 40 C
Height
3.3 mm
Length
9.27 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVMCPA - KIT DVR BOARD EVAL SYSTEM MXDEV1DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
CALL
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
CLRF
Syntax:
Operands:
Operation:
Status Affected: Z
Encoding:
Description:
Words:
Cycles:
Example:
1999 Microchip Technology Inc.
Before Instruction
After Instruction
Before Instruction
After Instruction
PC =
PC =
TOS =
FLAG_REG
FLAG_REG
Z
Subroutine Call
[ label ] CALL k
0
(PC) + 1
k
(STATUS<6:5>)
0
Subroutine call. First, return address
(PC+1) is pushed onto the stack. The
eight bit immediate address is loaded
into PC bits <7:0>. The upper bits
PC<10:9> are loaded from STA-
TUS<6:5>, PC<8> is cleared. CALL is
a two cycle instruction.
1
2
HERE
address (HERE)
address (THERE)
address (HERE + 1)
Clear f
[ label ] CLRF
0
00h
1
The contents of register ’f’ are cleared
and the Z bit is set.
1
1
CLRF
1001
0000
k
f
=
=
=
PC<7:0>;
PC<8>
Z
31
(f);
255
CALL
FLAG_REG
0x5A
0x00
1
kkkk
011f
Top of Stack;
f
THERE
PC<10:9>;
kkkk
ffff
CLRW
Syntax:
Operands:
Operation:
Status Affected: Z
Encoding:
Description:
Words:
Cycles:
Example:
CLRWDT
Syntax:
Operands:
Operation:
Status Affected: TO, PD
Encoding:
Description:
Words:
Cycles:
Example:
Before Instruction
After Instruction
Before Instruction
After Instruction
W
W
Z
WDT counter =
WDT counter =
WDT prescale =
TO
PD
=
=
=
Clear W
[ label ] CLRW
None
00h
1
The W register is cleared. Zero bit (Z)
is set.
1
1
CLRW
0x5A
0x00
1
Clear Watchdog Timer
[ label ] CLRWDT
None
00h
0
1
1
The CLRWDT instruction resets the
WDT. It also resets the prescaler, if the
prescaler is assigned to the WDT and
not Timer0. Status bits TO and PD are
set.
1
1
CLRWDT
0000
0000
=
=
Z
WDT prescaler (if assigned);
TO;
PD
PIC12C5XX
(W);
WDT;
?
0x00
0
1
1
0100
0000
DS40139E-page 51
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