PIC18LF2321-I/SS Microchip Technology, PIC18LF2321-I/SS Datasheet - Page 212
![IC PIC MCU FLASH 4KX16 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC18LF2321-I/SS
Manufacturer Part Number
PIC18LF2321-I/SS
Description
IC PIC MCU FLASH 4KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F2221-ISO.pdf
(402 pages)
3.PIC18F2221-ISO.pdf
(8 pages)
4.PIC18F2221-ISO.pdf
(30 pages)
5.PIC18F2221-ISO.pdf
(46 pages)
6.PIC18F2321-IML.pdf
(396 pages)
Specifications of PIC18LF2321-I/SS
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2221-ISO PDF datasheet #4
- PIC18F2221-ISO PDF datasheet #5
- PIC18F2321-IML PDF datasheet #6
- Current page: 212 of 402
- Download datasheet (7Mb)
PIC18F2221/2321/4221/4321 FAMILY
REGISTER 19-1:
DS39689F-page 212
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
TXSTA: TRANSMIT STATUS AND CONTROL REGISTER
bit 7
CSRC: Clock Source Select bit
Asynchronous mode:
Don’t care.
Synchronous mode:
1 = Master mode (clock generated internally from BRG)
0 = Slave mode (clock from external source)
TX9: 9-bit Transmit Enable bit
1 = Selects 9-bit transmission
0 = Selects 8-bit transmission
TXEN: Transmit Enable bit
1 = Transmit enabled
0 = Transmit disabled
SYNC: EUSART Mode Select bit
1 = Synchronous mode
0 = Asynchronous mode
SENDB: Send Break Character bit
Asynchronous mode:
1 = Send Sync Break on next transmission (cleared by hardware upon completion)
0 = Sync Break transmission completed
Synchronous mode:
Don’t care.
BRGH: High Baud Rate Select bit
Asynchronous mode:
1 = High speed
0 = Low speed
Synchronous mode:
Unused in this mode.
TRMT: Transmit Shift Register Status bit
1 = TSR empty
0 = TSR full
TX9D: 9th bit of Transmit Data
Can be address/data bit or a parity bit.
Legend:
R = Readable bit
-n = Value at POR
R/W-0
CSRC
Note:
SREN/CREN overrides TXEN in Sync mode.
R/W-0
TX9
R/W-0
TXEN
W = Writable bit
‘1’ = Bit is set
R/W-0
SYNC
SENDB
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
BRGH
© 2009 Microchip Technology Inc.
x = Bit is unknown
TRMT
R-1
R/W-0
TX9D
bit 0
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