DSPIC30F2011-30I/P Microchip Technology, DSPIC30F2011-30I/P Datasheet - Page 3

• Manufacturer Part Number: DSPIC30F2011-30I/P
• Description: IC DSPIC MCU/DSP 12K 18DIP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2011-30I/P

• Program Memory Type: FLASH
• Program Memory Size: 12KB (4K x 24)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 30 MHz
• Number Of Programmable I/os: 12
• Data Ram Size: 1 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011, DM300018, DM183021
• Minimum Operating Temperature: - 40 C
• Package: 18PDIP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Interface Type: I2C/SPI/UART
• On-chip Adc: 8-chx12-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F005 - MODULE SCKT DSPIC30F 18DIP/SOICDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLEACICE0202 - ADAPTER MPLABICE 18P 300 MIL
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F2011-30IP

TABLE 2:
© 2010 Microchip Technology Inc.
Note 1:
Module
ADC
I
I
I
2
2
2
C
C
C
Only those issues indicated in the last column apply to the current silicon revision.
Consumption in
Bus Collision
Sleep Mode
Addressing
Addressing
SILICON ISSUE SUMMARY (CONTINUED)
Feature
Current
10-bit
10-bit
Number
Item
17.
18.
19.
20.
When the I
using the same address bits (A10 and A9) as other I
devices, the A10 and A9 bits may not work as expected.
When the I
address of 0x102, the I2CxRCV register content for the lower
address byte is 0x01 rather than 0x02.
When the I
generates a glitch on the SDA and SCL pins, causing a false
communication start in a single-master configuration or a bus
collision in a multi-master configuration.
If the ADC module is in an enabled state when the device
enters Sleep Mode, the power-down current (I
device may exceed the device data sheet specifications.
2
2
2
C module is configured for 10-bit addressing
C module is configured as a 10-bit slave with an
C module is enabled, the dsPIC
Issue Summary
dsPIC30F2011/2012
®
DSC device
PD
) of the
2
C
DS80450D-page 3
Revisions
Affected
A1
X
X
X
X
(1)