PIC24HJ12GP202-I/ML Microchip Technology, PIC24HJ12GP202-I/ML Datasheet - Page 168

IC PIC MCU FLASH 4KX24 28QFN

PIC24HJ12GP202-I/ML

Manufacturer Part Number
PIC24HJ12GP202-I/ML
Description
IC PIC MCU FLASH 4KX24 28QFN
Manufacturer
Microchip Technology
Series
PIC® 24Hr

Specifications of PIC24HJ12GP202-I/ML

Core Size
16-Bit
Program Memory Size
12KB (4K x 24)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
40 MIPs
Connectivity
I²C, SPI, UART/USART
Number Of I /o
21
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC24
No. Of I/o's
21
Ram Memory Size
1KB
Cpu Speed
40MIPS
No. Of Timers
4
Processor Series
PIC24HJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1024 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel / 12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24HJ12GP202-I/ML
Manufacturer:
MICROCHIP
Quantity:
720
PIC24HJ12GP201/202
18.2
All of the PIC24HJ12GP201/202 devices power their
core digital logic at a nominal 2.5V. This can create a
conflict for designs that are required to operate at a
higher typical voltage, such as 3.3V. To simplify system
design, all devices in the PIC24HJ12GP201/202 family
incorporate an on-chip regulator that allows the device
to run its core logic from V
The regulator provides power to the core from the other
V
(less than 5 ohms) capacitor (such as tantalum or
ceramic) must be connected to the V
(Figure 18-1). This helps to maintain the stability of the
regulator. The recommended value for the filter capac-
itor is provided in Table 21-13 located in Section 21.1
“DC Characteristics”.
On a POR
voltage regulator to generate an output voltage. During
this time, designated as T
disabled. T
resumes operation after any power-down.
FIGURE 18-1:
DS70282B-page 166
DD
Note 1:
pins. When the regulator is enabled, a low-ESR
On-Chip Voltage Regulator
,
STARTUP
it takes approximately 20 μs for the on-chip
C
F
These are typical operating voltages. Refer
to TABLE 21-13: “Internal Voltage Regu-
lator Specifications” located in
Section 21.1 “DC Characteristics” for the
full operating ranges of V
3.3V
is applied every time the device
CONNECTIONS FOR THE
ON-CHIP VOLTAGE
REGULATOR
V
V
V
DD
DDCORE
SS
DD
PIC24H
STARTUP
.
/V
CAP
, code execution is
DD
DDCORE
and V
(1)
DDCORE
/V
CAP
.
Preliminary
pin
18.3
The Brown-out Reset (BOR) module is based on an
internal voltage reference circuit that monitors the reg-
ulated voltage V
module is to generate a device Reset when a brown-
out condition occurs. Brown-out conditions are gener-
ally caused by glitches on the AC mains (for example,
missing portions of the AC cycle waveform due to bad
power transmission lines, or voltage sags due to exces-
sive current draw when a large inductive load is turned
on).
A BOR generates a Reset pulse, which resets the
device. The BOR selects the clock source, based on
the device Configuration bit values (FNOSC<2:0> and
POSCMD<1:0>).
If an oscillator mode is selected, the BOR activates the
Oscillator Start-up Timer (OST). The system clock is
held until OST expires. If the PLL is used, the clock is
held until the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the PWRT time-out (TPWRT) will be
applied before the internal Reset is released. If TPWRT
= 0 and a crystal oscillator is being used, a nominal
delay of TFSCM = 100 is applied. The total delay in this
case is TFSCM.
The BOR Status bit (RCON<1>) is set to indicate that a
BOR has occurred. The BOR circuit, if enabled, contin-
ues to operate while in Sleep or Idle modes and resets
the device should VDD fall below the BOR threshold
voltage.
BOR: Brown-Out Reset
DDCORE
. The main purpose of the BOR
© 2007 Microchip Technology Inc.

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