PIC18F66J90-I/PT Microchip Technology, PIC18F66J90-I/PT Datasheet - Page 297
![IC PIC MCU FLASH 64KB 64-TQFP](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F66J90-I/PT
Manufacturer Part Number
PIC18F66J90-I/PT
Description
IC PIC MCU FLASH 64KB 64-TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F67J90-IPT.pdf
(450 pages)
2.PIC18F67J90-IPT.pdf
(3 pages)
3.PIC18F67J90-IPT.pdf
(10 pages)
4.PIC18F66J90-IPT.pdf
(444 pages)
Specifications of PIC18F66J90-I/PT
Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
51
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3923 B
Interface Type
AUSART, EUSART, I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
51
Number Of Timers
4
Operating Supply Voltage
2.65 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM163030
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F66J90-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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21.2
A single comparator is shown in Figure 21-2, along with
the relationship between the analog input levels and
the digital output. When the analog input at V
than the analog input V
is a digital low level. When the analog input at V
greater than the analog input V
comparator is a digital high level. The shaded areas of
the output of the comparator in Figure 21-2 represent
the uncertainty due to input offsets and response time.
21.3
Depending on the comparator operating mode, either
an external or internal voltage reference may be used.
The analog signal present at V
signal at V
is adjusted accordingly (Figure 21-2).
FIGURE 21-2:
21.3.1
When external voltage references are used, the
comparator module can be configured to have the com-
parators operate from the same or different reference
sources. However, threshold detector applications may
require the same reference. The reference signal must
be between V
pin of the comparator(s).
© 2009 Microchip Technology Inc.
V
V
Output
IN
IN
-
+
V
V
IN
IN
Comparator Operation
Comparator Reference
+
-
IN
EXTERNAL REFERENCE SIGNAL
+ and the digital output of the comparator
SS
and V
+
–
IN
SINGLE COMPARATOR
DD
-, the output of the comparator
and can be applied to either
IN
IN
- is compared to the
-, the output of the
Output
IN
+ is less
IN
+ is
Preliminary
PIC18F87J90 FAMILY
21.3.2
The comparator module also allows the selection of an
internally generated voltage reference from the
comparator voltage reference module. This module is
described in more detail in Section 22.0 “Comparator
Voltage Reference Module”.
The internal reference is only available in the mode
where four inputs are multiplexed to two comparators
(CM<2:0> = 110). In this mode, the internal voltage ref-
erence is applied to the V
21.4
Response time is the minimum time, after selecting a
new reference voltage or input source, before the
comparator output has a valid level. If the internal ref-
erence is changed, the maximum delay of the internal
voltage reference must be considered when using the
comparator outputs. Otherwise, the maximum delay of
the comparators should be used (see Section 27.0
“Electrical Characteristics”).
21.5
The comparator outputs are read through the CMCON
register. These bits are read-only. The comparator
outputs may also be directly output to the RF1 and RF2
I/O pins. When enabled, multiplexors in the output path
of the RF1 and RF2 pins will switch and the output of
each pin will be the unsynchronized output of the
comparator.
comparators is related to the input offset voltage and
the response time given in the specifications.
Figure 21-3 shows the comparator output block
diagram.
The TRISF bits will still function as an output enable/
disable for the RF1 and RF2 pins while in this mode.
The polarity of the comparator outputs can be changed
using the C2INV and C1INV bits (CMCON<5:4>).
Note 1: When reading the PORT register, all pins
2: Analog levels on any pin defined as a
Comparator Response Time
Comparator Outputs
INTERNAL REFERENCE SIGNAL
configured as analog inputs will read as
‘0’. Pins configured as digital inputs will
convert an analog input according to the
Schmitt Trigger input specification.
digital input may cause the input buffer to
consume more current than is specified.
The
uncertainty
IN
+ pin of both comparators.
of
DS39933C-page 295
each
of
the
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