DSPIC33FJ128GP202-E/SP Microchip Technology, DSPIC33FJ128GP202-E/SP Datasheet - Page 142
![IC DSPIC MCU/DSP 128K 28-DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
DSPIC33FJ128GP202-E/SP
Manufacturer Part Number
DSPIC33FJ128GP202-E/SP
Description
IC DSPIC MCU/DSP 128K 28-DIP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ32GP204-IPT.pdf
(14 pages)
2.DSPIC33FJ32GP302-ISO.pdf
(412 pages)
3.DSPIC33FJ64GP804-IML.pdf
(402 pages)
Specifications of DSPIC33FJ128GP202-E/SP
Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
21
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Data Ram Size
8 KB
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA330019 - PIM DSPIC33F MC 44P-100P QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ128GP202-E/SP
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
DSPIC33FJ128GP202-E/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- DSPIC33FJ32GP204-IPT PDF datasheet
- DSPIC33FJ32GP302-ISO PDF datasheet #2
- DSPIC33FJ64GP804-IML PDF datasheet #3
- Current page: 142 of 412
- Download datasheet (6Mb)
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
9.1
The dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/
X04, and dsPIC33FJ128GPX02/X04 devices provide
seven system clock options:
• Fast RC (FRC) Oscillator
• FRC Oscillator with Phase Locked Loop (PLL)
• Primary (XT, HS or EC) Oscillator
• Primary Oscillator with PLL
• Secondary (LP) Oscillator
• Low-Power RC (LPRC) Oscillator
• FRC Oscillator with postscaler
9.1.1
The Fast RC (FRC) internal oscillator runs at a nominal
frequency of 7.37 MHz. User software can tune the
FRC frequency. User software can optionally specify a
factor (ranging from 1:2 to 1:256) by which the FRC
clock frequency is divided. This factor is selected using
the FRCDIV<2:0> bits (CLKDIV<10:8>).
The primary oscillator can use one of the following as
its clock source:
• Crystal (XT): Crystals and ceramic resonators in
• High-Speed Crystal (HS): Crystals in the range of
• External Clock (EC): External clock signal is
The secondary (LP) oscillator is designed for low power
and uses a 32.768 kHz crystal or ceramic resonator.
The LP oscillator uses the SOSCI and SOSCO pins.
The Low-Power RC (LPRC) internal oscIllator runs at a
nominal frequency of 32.768 kHz. It is also used as a
reference clock by the Watchdog Timer (WDT) and
Fail-Safe Clock Monitor (FSCM).
The clock signals generated by the FRC and primary
oscillators can be optionally applied to an on-chip PLL
to provide a wide range of output frequencies for device
operation.
Section 9.1.4 “PLL
The FRC frequency depends on the FRC accuracy
(see
Tuning register (see
DS70292E-page 142
the range of 3 MHz to 10 MHz. The crystal is
connected to the OSC1 and OSC2 pins.
10 MHz to 40 MHz. The crystal is connected to
the OSC1 and OSC2 pins.
directly applied to the OSC1 pin.
Table
CPU Clocking System
30-19) and the value of the FRC Oscillator
SYSTEM CLOCK SOURCES
PLL
configuration
Configuration”.
Register
9-4).
is
described
in
9.1.2
The oscillator source used at a device Power-on
Reset event is selected using Configuration bit
settings. The oscillator Configuration bit settings are
located in the Configuration registers in the program
memory. (Refer to
Bits”
Selection
(FOSCSEL<2:0>), and the Primary Oscillator Mode
Select
(FOSC<1:0>), select the oscillator source that is used
at a Power-on Reset. The FRC primary oscillator is
the default (unprogrammed) selection.
The Configuration bits allow users to choose among 12
different clock modes, shown in
The output of the oscillator (or the output of the PLL if
a PLL mode has been selected) F
generate the device instruction clock (F
peripheral clock time base (F
operating speed of the device, and speeds up to 40
MHz are supported by the dsPIC33FJ32GP302/304,
dsPIC33FJ64GPX02/X04, and dsPIC33FJ128GPX02/
X04 architecture.
Instruction execution speed or device operating
frequency, F
EQUATION 9-1:
9.1.3
The Auxiliary Oscillator (AOSC) can be used for periph-
erals that need to operate at a frequency unrelated to
the system clock such as a Digital-to-Analog Converter
(DAC).
The Auxiliary Oscillator can use one of the following as
its clock source:
• Crystal (XT): Crystal and ceramic resonators in
• High-Speed Crystal (HS): Crystals in the range of
• External Clock (EC): External clock signal up to
the range of 3 MHz to 10 MHz. The crystal is
connected to the SOCI and SOSCO pins.
10 to 40 MHz. The crystal is connected to the
SOSCI and SOSCO pins.
64 MHz. The external clock signal is directly
applied to SOSCI pin.
for further details.) The Initial Oscillator
Configuration
SYSTEM CLOCK SELECTION
AUXILIARY OSCILLATOR
CY
Configuration
, is given by:
F
CY
DEVICE OPERATING
FREQUENCY
Section 27.1 “Configuration
© 2011 Microchip Technology Inc.
=
F
-------------
bits,
OSC
2
bits,
Table
P
OSC
). F
is divided by 2 to
9-1.
CY
POSCMD<1:0>
FNOSC<2:0>
defines the
CY
) and
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