PIC18LF2439-I/SP Microchip Technology, PIC18LF2439-I/SP Datasheet - Page 177
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PIC18LF2439-I/SP
Manufacturer Part Number
PIC18LF2439-I/SP
Description
IC MCU FLASH 6KX16 EE A/D 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Specifications of PIC18LF2439-I/SP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
12KB (6K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
640 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
640 B
Interface Type
I2C, SPI, AUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
21
Number Of Timers
16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DV164005, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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FIGURE 17-5:
TABLE 17-7:
2002 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
RCSTA
RCREG
TXSTA
SPBRG
Legend: x = unknown, - = unimplemented locations read as '0'.
Note 1: The PSPIF, PSPIE and PSPIP bits are reserved on the PIC18F2X39 devices; always maintain these bits
Name
Note:
RX (pin)
Rcv Shift
Reg
Rcv Buffer Reg
Read Rcv
Buffer Reg
RCREG
RCIF
(Interrupt Flag)
OERR bit
CREN
Shaded cells are not used for Asynchronous Reception.
clear.
This timing diagram shows three words appearing on the RX input. The RCREG (receive buffer) is read after the third word, causing
the OERR (overrun) bit to be set.
USART Receive Register
Baud Rate Generator Register
GIE/GIEH
PSPIE
PSPIP
PSPIF
CSRC
SPEN
Bit 7
REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
(1)
(1)
(1)
START
ASYNCHRONOUS RECEPTION
bit
PEIE/
GIEL
ADIF
ADIE
ADIP
Bit 6
RX9
TX9
bit0
TMR0IE INT0IE
bit1
SREN
TXEN
RCIE
RCIP
RCIF
Bit 5
CREN ADDEN FERR
SYNC
TXIE
TXIP
Bit 4
TXIF
bit7/8
STOP
Preliminary
bit
SSPIE
SSPIP
SSPIF
RBIE
Bit 3
—
Word 1
RCREG
START
bit
TMR0IF INT0IF
BRGH
Bit 2
bit0
—
—
—
TMR2IF TMR1IF 0000 0000
TMR2IE TMR1IE 0000 0000
TMR2IP TMR1IP 0000 0000
OERR
TRMT
Bit 1
bit7/8 STOP
Word 2
RCREG
RX9D
TX9D
RBIF
Bit 0
bit
PIC18FXX39
START
bit
0000 000x
0000 -00x
0000 0000
0000 -010
0000 0000
POR, BOR
Value on
bit7/8
DS30485A-page 175
STOP
0000 000u
0000 0000
0000 0000
0000 0000
0000 -00x
0000 0000
0000 -010
0000 0000
Value on
All Other
bit
RESETS
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