ATMEGA644-20PU Atmel, ATMEGA644-20PU Datasheet - Page 22
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ATMEGA644-20PU
Manufacturer Part Number
ATMEGA644-20PU
Description
IC AVR MCU FLASH 64K 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA644-20PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRRZ541, ATAVRRAVEN, ATAVRRZRAVEN, ATAVRRZUSBSTICK, ATAVRRZ201
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
2KB
Ram Memory Size
4KB
Cpu Speed
20MHz
No. Of Timers
3
Rohs Compliant
Yes
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA644-20PU
Manufacturer:
Atmel
Quantity:
1 930
9.11
9.12
9.13
9.14
2593NS–AVR–07/10
Rev. 2593D - 04/06
Rev. 2593C - 03/06
Rev. 2593B - 03/06
Rev. 2593A-06/05
1.
1.
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Initial revision.
Updated
Updated
Added “Not recommended in new designs”.
Removed RAMPZ– Extended Z-pointer Register for ELPM/SPM from datasheet.
Updated
Updated code example in
Updated
Updated
Removed the occurancy of ATmega164 and ATmega324.
Updated Adresses in Registers.
Updated
Updated SRAM sizes in
Updated
Updated
Updated Register bit Discription in
Updated Note in
Updated Feauters in
Changed name from “SFIOR“ to “ADCSRB“ in
”Bit 5 – ADATE: ADC Auto Trigger Enable” on page 250
Reserved Bits” on page
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Updated
Updated
Updated Example in
Updated
Updated
Updated
Updated
1 on page
322,
Table 27-1 on page
”Bit 6 – ACBG: Analog Comparator Bandgap Select” on page
”Prescaling and Conversion Timing” on page
Table 10-1 on page
”Setting the Boot Loader Lock Bits by SPM” on page
”Register Summary” on page
”Architectural Overview” on page
”I/O Memory” on page
”PRR – Power Reduction Register” on page
”Signature Bytes” on page
”DC Characteristics” on page
”Typical Characteristics” on page
”Register Summary” on page
Figure 6-2 on page 18
”Errata” on page
Table 9-1 on page
260,
Table 25-7 on page
”Overview of the TWI Module” on page
”Supply Current of IO modules” on page
”Analog-to-digital Converter” on page
251.
”SRAM Data Memory” on page
331,
”Interrupt Vectors in ATmega644” on page
365.
47,
55.
Table 27-2 on page
20.
Table 9-4 on page 51,Table 10-1 on page 55,Table 23-
and
”Register Description” on page
287.
287,
Figure 21-1 on page
354.
316.
354.
Table 25-15 on page 299,Table 26-6 on page
9.
326.
”Starting a Conversion” on page
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44.
236.
18.
206.
234.
233.
331.
276.
and
ATmega644
146.
”Bit 7, 5:3 – Res:
55.
231.
235, in
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