PIC18LF448-I/PT Microchip Technology, PIC18LF448-I/PT Datasheet - Page 318
![IC PIC MCU FLASH 8KX16 44TQFP](/photos/6/82/68251/c04-076_pt_sml.jpg)
PIC18LF448-I/PT
Manufacturer Part Number
PIC18LF448-I/PT
Description
IC PIC MCU FLASH 8KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18LF242-ISO.pdf
(36 pages)
2.PIC18F248-ISO.pdf
(402 pages)
3.PIC18F248-ISO.pdf
(8 pages)
Specifications of PIC18LF448-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18LF448-I/PT
Manufacturer:
Microchip Technology
Quantity:
135
Company:
Part Number:
PIC18LF448-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
† If WDT causes wake-up, this bit is cleared.
DS41159E-page 316
PIC18FXX8
Q Cycle Activity:
Before Instruction
After Instruction
Decode
TO =
PD =
TO =
PD =
Q1
?
?
1 †
0
operation
Enter Sleep Mode
[ label ]
None
00h
0
1
0
TO, PD
The Power-Down status bit (PD) is
cleared. The Time-out status bit (TO)
is set. Watchdog Timer and its
postscaler are cleared.
The processor is put into Sleep mode
with the oscillator stopped.
1
1
SLEEP
No
Q2
0000
WDT postscaler,
TO,
PD
WDT,
SLEEP
0000
Process
Data
Q3
0000
Sleep
Go to
Q4
0011
SUBFWB
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example 1:
Example 2:
Example 3:
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
REG
W
C
REG
W
C
Z
N
Q1
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
register ‘f’
(W) – (f) – (C)
Subtract register ‘f’ and Carry flag
1
Subtract f from W with Borrow
[ label ]
0
d
a
N, OV, C, DC, Z
(borrow) from W (2’s complement
method). If ‘d’ is ‘0’, the result is stored
in W. If ‘d’ is ‘1’, the result is stored in
register ‘f’ (default). If ‘a’ is ‘0’, the
Access Bank will be selected,
overriding the BSR value. If ‘a’ is ‘1’,
then the bank will be selected as per
the BSR value (default).
1
Read
SUBFWB REG
SUBFWB
SUBFWB
Q2
0101
0x03
0x02
0x01
0xFF
0x02
0x00
0x00
0x01
2
5
1
2
3
1
0
0
1
2
0
0
2
1
1
0
f
© 2006 Microchip Technology Inc.
[0,1]
[0,1]
255
; result is positive
; result is zero
SUBFWB
; result is negative
01da
REG, 0, 0
REG, 1, 0
Process
Data
Q3
dest
ffff
f [,d [,a]]
destination
Write to
Q4
ffff
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