PIC32MX675F256L-80I/PT Microchip Technology, PIC32MX675F256L-80I/PT Datasheet - Page 48
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PIC32MX675F256L-80I/PT
Manufacturer Part Number
PIC32MX675F256L-80I/PT
Description
IC MCU 32BIT 256KB FLASH 100TQFP
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheets
1.PIC32MX320F032H-40IPT.pdf
(66 pages)
2.PIC32MX575F256H-80IMR.pdf
(2 pages)
3.PIC32MX575F256H-80IMR.pdf
(254 pages)
4.PIC32MX575F256H-80IMR.pdf
(14 pages)
5.PIC32MX575F256H-80IPT.pdf
(240 pages)
Specifications of PIC32MX675F256L-80I/PT
Core Size
32-Bit
Program Memory Size
256KB (256K x 8)
Core Processor
MIPS32® M4K™
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Controller Family/series
PIC32
Ram Memory Size
64KB
Cpu Speed
80MHz
No. Of Timers
5
Interface
I2C, SPI, UART, USB
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F256L-80I/PT
Manufacturer:
ON
Quantity:
1 500
Company:
Part Number:
PIC32MX675F256L-80I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC32MX
REGISTER 18-3:
DS61145G-page 48
bit 31
bit 23
bit 15
bit 7
Legend:
R = readable bit
U = unimplemented bit, read as ‘0’
bit 31-19
bit 18-16
bit 15
bit 14-11
bit 10-8
bit 7
UPLLEN
R/P-1
r-1
r-1
r-1
—
—
—
Reserved: Maintain as ‘1’
FPLLODIV<2:0>: Default Postscaler for PLL bits
111 = PLL output divided by 256
110 = PLL output divided by 64
101 = PLL output divided by 32
100 = PLL output divided by 16
011 = PLL output divided by 8
010 = PLL output divided by 4
001 = PLL output divided by 2
000 = PLL output divided by 1
UPLLEN: USB PLL Enable bit
1 = Enable USB PLL
0 = Disable and bypass USB PLL
Reserved: Maintain as ‘1’
UPLLIDIV<2:0>: PLL Input Divider bits
111 = 12x divider
110 = 10x divider
101 = 6x divider
100 = 5x divider
011 = 4x divider
010 = 3x divider
001 = 2x divider
000 = 1x divider
Reserved: Maintain as ‘1’
R/P-1
r-1
r-1
r-1
—
—
—
DEVCFG2: DEVICE CONFIGURATION WORD 2
FPLLMULT<2:0>
W = writable bit
R/P-1
r-1
r-1
r-1
—
—
—
R/P-1
r-1
r-1
r-1
—
—
—
P = programmable bit
-n = bit value at POR: (‘0’, ‘1’, x = unknown)
r-1
r-1
r-1
r-1
—
—
—
—
R/P-1
R/P-1
R/P-1
r-1
—
© 2010 Microchip Technology Inc.
FPLLODIV<2:0>
UPLLIDIV<2:0>
FPLLIDIV<2:0>
r = reserved bit
R/P-1
R/P-1
R/P-1
r-1
—
R/P-1
R/P-1
R/P-1
r-1
—
bit 24
bit 16
bit 8
bit 0