EP9302-CQZ Cirrus Logic Inc, EP9302-CQZ Datasheet - Page 18
![IC ARM9 SOC PROCESSOR 208LQFP](/photos/12/23/122385/mfg_ep9302_parts_sml.jpg)
EP9302-CQZ
Manufacturer Part Number
EP9302-CQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(824 pages)
2.EP9302-IQZ.pdf
(42 pages)
3.EP9302-IQZ.pdf
(4 pages)
4.EP9302-IQZ.pdf
(40 pages)
Specifications of EP9302-CQZ
Program Memory Type
ROMless
Package / Case
208-LQFP
Core Processor
ARM9
Core Size
16/32-Bit
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
USB, USART, SPI
Maximum Clock Frequency
200 MHz
Number Of Programmable I/os
37
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
4
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1137
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP9302-CQZ
Manufacturer:
Cirrus
Quantity:
3 295
Company:
Part Number:
EP9302-CQZ
Manufacturer:
ALTERA
Quantity:
672
Part Number:
EP9302-CQZ
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
EP9302
High-speed ARM9 System-on-chip Processor with MaverickCrunch
Static Memory 32-bit Read on 8-bit External Bus
18
AD setup to CSn assert time
CSn assert to Address transition time
Address assert time
AD transition to CSn deassert time
AD hold from CSn deassert time
RDn assert time
CSn to RDn delay time
CSn assert to DQMn assert delay time
DA setup to AD transition time
DA setup to RDn deassert time
DA hold from AD transition time
DA hold from RDn deassert time
DQMn
WAIT
WRn
RDn
CSn
AD
DA
Parameter
t
ADs
Figure 6. Static Memory Multiple Word Read 8-bit Cycle Timing Measurement
t
DAs1
t
AD1
t
t
RDd
DQMd
Copyright 2010 Cirrus Logic (All Rights Reserved)
Symbol
t
t
RDpwL
t
t
t
t
DQMd
t
t
t
t
t
t
DAs1
DAs2
DAh1
DAh2
AD1
AD2
AD3
ADh
RDd
ADs
t
AD2
t
DAh1
t
HCLK
t
t
Min
HCLK
HCLK
15
0
0
-
-
-
-
-
-
+ 12
t
DAs1
t
t
HCLK
AD2
t
DAh1
t
t
t
HCLK
HCLK
HCLK
× (4 × WST1 + 5)
× (WST1 + 1)
× (WST1 + 1)
× (WST1 + 2)
Typ
-
-
-
-
-
-
-
-
t
DAs1
t
t
AD3
DAh1
1
t
RDd
Max
3
1
-
-
-
-
-
-
-
-
-
-
t
DAs2
t
DAh2
DS653F2
Unit
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ADh