C8051T606-GM Silicon Laboratories Inc, C8051T606-GM Datasheet
C8051T606-GM
Manufacturer Part Number
C8051T606-GM
Description
IC 8051 MCU 1.5K-EEPROM 11-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051T60xr
Specifications of C8051T606-GM
Program Memory Type
OTP
Program Memory Size
1.5KB (1.5K x 8)
Package / Case
11-QFN
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
6
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
6
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T606DK
Minimum Operating Temperature
- 40 C
Package
11QFN EP
Device Core
8051
Family Name
C8051T60x
Maximum Speed
25 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1668 - CARD DAUGHTER QFN10 SOCKET336-1667 - CARD DAUGHTER MSOP SOCKET336-1666 - KIT DEVELOPMENT FOR C8051T606336-1404 - KIT DEV FOR C8051T60X MCU'S
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1662-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051T606-GM
Manufacturer:
SILICON
Quantity:
3 500
Part Number:
C8051T606-GM
Manufacturer:
SILICONLABS/芯科
Quantity:
20 000
Analog Peripherals
Comparator
Memory
-
-
On-Chip Debug
-
-
Supply Voltage 1.8 to 3.6 V
-
-
Temperature Range: –40 to +85 °C
Development Kit: C8051T600DK
Small Form Factor
C2CK/RST
128 bytes internal data RAM
1.5 kB one time programmable code memory
C8051F300 can be used as in-system code development platform; com-
plete development kit available
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug
On-chip LDO regulator for core supply
Built-in brown-out detector
-
-
-
GND
VDD
Programmable hysteresis and response time
Configurable as interrupt or reset source
Low current ( 0.5 µA)
Power Net
Programming
C2D
Power On
Hardware
Monitor
Debug /
Reset
VDD
EXTCLK
Reset
1.5kB EPROM (OTP)
External
Controller Core
Circuit
Clock
System Clock
Program Memory
Configuration
SYSCLK
25MHz 8051
128 byte SRAM
Copyright © 2009 by Silicon Laboratories
Oscillator
Precision
2%
25 MIPS, 1.5 kB EPROM (OTP), Mixed-Signal MCU
SFR
Bus
High-Speed 8051 µC Core
-
-
-
Digital Peripherals
-
-
-
-
Clock Sources
-
-
-
Package
-
-
-
Timers 0,
1, and 2
UART
Analog Peripherals
Digital Peripherals
PCA/
WDT
Pipe-lined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
25 MIPS peak throughput with 25 MHz clock
Expanded interrupt handler
6 port I/O ; All 5 V tolerant with high sink current
Hardware enhanced UART and SMBus™/I
Three general purpose 16-bit counter/timers
16-bit programmable counter array (PCA) with three capture/compare
modules
Internal oscillator: 24.5 MHz with ±2% accuracy supports UART
operation
External oscillator: CMOS clock or external capacitor
Can switch between clock sources on-the-fly; useful in power saving
modes
2x2 mm QFN10
11-pin QFN (pin compatible with F300/T600)
MSOP-10 (lowest cost option)
Port I/O Configuration
I2C
-
-
-
-
Crossbar Control
8 or 16-bit PWM
Rising/falling edge capture
Frequency output
Software timer
CP0
Comparator
Crossbar
Decoder
Priority
+
-
Drivers
Port 0
C8051T606
2
C serial ports
P0.1
P0.2/VPP
P0.3/EXCLK
P0.4
P0.5
P0.7/C2D
3.23.2009
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