C8051T602-GS Silicon Laboratories Inc, C8051T602-GS Datasheet - Page 113
![IC 8051 MCU 4K-EEPROM 14-SOIC](/photos/12/25/122560/c8051t602-gs_sml.jpg)
C8051T602-GS
Manufacturer Part Number
C8051T602-GS
Description
IC 8051 MCU 4K-EEPROM 14-SOIC
Manufacturer
Silicon Laboratories Inc
Series
C8051T60xr
Datasheet
1.C8051T600EDB.pdf
(188 pages)
Specifications of C8051T602-GS
Program Memory Type
OTP
Program Memory Size
4KB (4K x 8)
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051T6x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C/SMBus/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
8
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051T600DK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1404 - KIT DEV FOR C8051T60X MCU'S
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1655-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051T602-GS
Manufacturer:
Silicon Labs
Quantity:
135
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Registers XBR1 and XBR2 are used to assign the digital I/O resources to the physical I/O Port pins. Note
that when the SMBus is selected, the crossbar assigns both pins associated with the SMBus (SDA and
SCL). UART0 pin assignments are fixed for bootloading purposes: UART TX0 is always assigned to P0.4;
UART RX0 is always assigned to P0.5. Standard Port I/Os appear contiguously after the prioritized func-
tions have been assigned.
SYSCLK
Function
Pin Skip
Settings
Special
Signals
Figure 22.5. Priority Crossbar Decoder Example 2 - Skipping Pins
CP0A
CEX0
CEX1
CEX2
SDA
RX0
SCL
CP0
Port
TX0
ECI
Pin
T0
T1
0 1 2 3 4 5 6 7
1 0 0 1 0 0 0 x
XBR0
P0
In this example, the crossbar is configured to
assign the UART TX0 and RX0 signals, the
SMBus signals, and the SYSCLK signal. Note
that the SMBus signals are assigned as a pair.
Additionally, pins P0.0 and P0.3 are configured
to be skipped using the XBR0 register.
are used by the peripherals in this configuration.
1
2
3
respectively.
4
All unassigned pins, including those skipped by
XBR0 can be used as GPIO or for other non-
crossbar functions.
Rev. 1.2
st
nd
rd
th
TX0 is assigned to P0.4
SYSCLK is assigned to P0.6
SDA and SCL are assigned to P0.2 and P0.3,
RX0 is assigned to P0.5
These boxes represent the port pins which
C8051T600/1/2/3/4/5/6
113
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