C8051F713-GM Silicon Laboratories Inc, C8051F713-GM Datasheet - Page 5
![IC 8051 MCU 8K FLASH 48-QFN](/photos/12/26/122691/c8051f713-gm_sml.jpg)
C8051F713-GM
Manufacturer Part Number
C8051F713-GM
Description
IC 8051 MCU 8K FLASH 48-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F71xr
Specifications of C8051F713-GM
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
32 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SMBus, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
39
Number Of Timers
4
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
For Use With
336-1635 - DEV KIT FOR C8051F700
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Details
Other names
336-1614-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F713-GM
Manufacturer:
Silicon Laboratories Inc
Quantity:
135
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23. EEPROM ............................................................................................................... 155
24. Power Management Modes................................................................................. 160
25. Reset Sources ...................................................................................................... 163
26. Watchdog Timer................................................................................................... 169
27. Oscillators and Clock Selection ......................................................................... 171
28. Port Input/Output ................................................................................................. 180
22.2. Non-volatile Data Storage ............................................................................. 149
22.3. Security Options ............................................................................................ 149
22.4. Flash Write and Erase Guidelines ................................................................. 150
23.1. RAM Reads and Writes ................................................................................. 155
23.2. Auto Increment .............................................................................................. 155
23.3. Interfacing with the EEPROM........................................................................ 155
23.4. EEPROM Security ......................................................................................... 156
24.1. Idle Mode....................................................................................................... 160
24.2. Stop Mode ..................................................................................................... 161
24.3. Suspend Mode .............................................................................................. 161
25.1. Power-On Reset ............................................................................................ 164
25.2. Power-Fail Reset / VDD Monitor ................................................................... 165
25.3. External Reset ............................................................................................... 166
25.4. Missing Clock Detector Reset ....................................................................... 166
25.5. Comparator0 Reset ....................................................................................... 167
25.6. Watchdog Timer Reset.................................................................................. 167
25.7. Flash Error Reset .......................................................................................... 167
25.8. Software Reset .............................................................................................. 167
26.1. Enable/Reset WDT........................................................................................ 169
26.2. Disable WDT ................................................................................................. 169
26.3. Disable WDT Lockout.................................................................................... 169
26.4. Setting WDT Interval ..................................................................................... 169
27.1. System Clock Selection................................................................................. 171
27.2. Programmable Internal High-Frequency (H-F) Oscillator .............................. 173
27.3. External Oscillator Drive Circuit..................................................................... 175
28.1. Port I/O Modes of Operation.......................................................................... 181
28.2. Assigning Port I/O Pins to Analog and Digital Functions............................... 182
22.1.2. Flash Erase Procedure ......................................................................... 148
22.1.3. Flash Write Procedure .......................................................................... 149
22.4.1. VDD Maintenance and the VDD Monitor .............................................. 151
22.4.2. PSWE Maintenance .............................................................................. 151
22.4.3. System Clock ........................................................................................ 152
27.3.1. External Crystal Example...................................................................... 177
27.3.2. External RC Example............................................................................ 178
27.3.3. External Capacitor Example.................................................................. 179
28.1.1. Port Pins Configured for Analog I/O...................................................... 181
28.1.2. Port Pins Configured For Digital I/O...................................................... 181
28.1.3. Interfacing Port I/O to 5 V Logic ............................................................ 182
28.1.4. Increasing Port I/O Drive Strength ........................................................ 182
Rev. 1.0
C8051F70x/71x
5
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