C8051F343-GM Silicon Laboratories Inc, C8051F343-GM Datasheet - Page 50
![IC 8051 MCU 32K FLASH MEM 32-QFN](/photos/12/27/122777/c8051f343-gm_sml.jpg)
C8051F343-GM
Manufacturer Part Number
C8051F343-GM
Description
IC 8051 MCU 32K FLASH MEM 32-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F34xr
Datasheet
1.C8051F349-GQ.pdf
(276 pages)
Specifications of C8051F343-GM
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
32-QFN
Core Processor
8051
Core Size
8-Bit
Speed
48MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 21x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Data Ram Size
2304 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F340DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1748 - ADAPTER TOOLSTICK FOR C8051F34X770-1006 - ISP 4PORT FOR SILABS C8051F MCU
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1346-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F343-GM
Manufacturer:
Silicon Labs
Quantity:
135
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C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
50
Bits7–0: ADC0 Data Word High-Order Bits.
Bits7–3: AD0SC4–0: ADC0 SAR Conversion Clock Period Bits.
Bit2:
Bits1–0: UNUSED. Read = 00b; Write = don’t care.
Bits7–0: ADC0 Data Word Low-Order Bits.
AD0SC4
R/W
R/W
R/W
Bit7
Bit7
Bit7
For AD0LJST = 0: Bits 7–2 are the sign extension of Bit1. Bits 1-0 are the upper 2 bits of the
10-bit ADC0 Data Word.
For AD0LJST = 1: Bits 7–0 are the most-significant bits of the 10-bit ADC0 Data Word.
SAR Conversion clock is derived from system clock by the following equation, where
AD0SC refers to the 5-bit value held in bits AD0SC4-0. SAR Conversion clock requirements
are given in Table 5.1.
AD0LJST: ADC0 Left Justify Select.
0: Data in ADC0H:ADC0L registers are right-justified.
1: Data in ADC0H:ADC0L registers are left-justified.
For AD0LJST = 0: Bits 7–0 are the lower 8 bits of the 10-bit Data Word.
For AD0LJST = 1: Bits 7–6 are the lower 2 bits of the 10-bit Data Word. Bits 5–0 will always
read ‘0’.
AD0SC
AD0SC3
R/W
R/W
R/W
Bit6
Bit6
Bit6
SFR Definition 5.4. ADC0H: ADC0 Data Word MSB
SFR Definition 5.3. ADC0CF: ADC0 Configuration
SFR Definition 5.5. ADC0L: ADC0 Data Word LSB
=
SYSCLK
--------------------- - 1
CLK
AD0SC2
R/W
R/W
Bit5
R/W
Bit5
Bit5
SAR
–
AD0SC1
R/W
R/W
Bit4
R/W
Bit4
Bit4
AD0SC0 AD0LJST
Rev. 1.3
R/W
R/W
Bit3
R/W
Bit3
Bit3
R/W
R/W
Bit2
R/W
Bit2
Bit2
R/W
R/W
R/W
Bit1
Bit1
Bit1
-
R/W
R/W
R/W
Bit0
Bit0
Bit0
-
SFR Address:
SFR Address:
SFR Address:
00000000
00000000
Reset Value
Reset Value
Reset Value
11111000
0xBE
0xBC
0xBD
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