C8051F346-GM Silicon Laboratories Inc, C8051F346-GM Datasheet - Page 21

• Manufacturer Part Number: C8051F346-GM
• Description: IC 8051 MCU 64K FLASH MEM 32-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F34xr

Specifications of C8051F346-GM

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 32-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 21x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4352 B
• Interface Type: I2C, SPI, UART
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-F34X, KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F340DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1748 - ADAPTER TOOLSTICK FOR C8051F34X770-1006 - ISP 4PORT FOR SILABS C8051F MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1347-5

C2CK/RST
VREG
VBUS
GND
VDD
C2D
D+
D-
Power-On
Regulator
Monitor
Voltage
Supply
Reset
XTAL1
XTAL2
Reset
Power
Net
System Clock Setup
Transceiver
Oscillator
Oscillator
Recovery
External
Full / Low
Internal
Debug / Programming
64/32 kB ISP FLASH
Clock
USB Peripheral
Speed
Controller Core
Figure 1.3. C8051F348/C Block Diagram
Program Memory
CIP-51 8051
256 Byte RAM
4/2 kB XRAM
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
Hardware
Low Freq.
Oscillator
Controller
Multiplier
1k Byte
Clock
RAM
SFR
Bus
Rev. 1.3
Timers 0, 1,
Analog Peripherals
PCA/WDT
External Memory
Digital Peripherals
UART0
UART1
SMBus
Port I/O Configuration
2, 3
SPI
Crossbar Control
2 Comparators
Interface
Address
CP0
CP1
Control
Data
+
+
-
-
Crossbar
Decoder
Priority
P2 / P3
P1
P4
Drivers
Drivers
Drivers
Drivers
Drivers
Port 0
Port 1
Port 2
Port 3
Port 4
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6/XTAL1
P0.7/XTAL2
P1.0
P1.1
P1.2
P1.3
P1.4/CNVSTR
P1.5/VREF
P1.6
P1.7
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
21