PIC16F57-E/SP Microchip Technology, PIC16F57-E/SP Datasheet - Page 3

• Manufacturer Part Number: PIC16F57-E/SP
• Description: IC MCU FLASH 2KX12 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F57-E/SP

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 20
• Program Memory Size: 3KB (2K x 12)
• Program Memory Type: FLASH
• Ram Size: 72 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

2.4.1
The normal sequence for writing the program array is
to load four words to sequential addresses, then issue
a Begin Programming command. The PC must be
advanced following the first three loads, but not
advanced following the last program load until after the
programming cycle. The programming cycle is started
and timed externally. Then, the PC is advanced after
the programming cycle. The cycle repeats to program
the array. After writing the array, the PC may be reset
and read back to verify the write. It is not possible to
verify immediately following the write because the PC
can only increment, not decrement. See Figure 2-10.
It is important that the PC is not advanced after the 4th
word is loaded as the programming cycle writes the row
selected by the PC <11:2>. If the PC is advanced, the
data will be written to the next row.
2.4.2
Configuration memory must be written one word at a
time. The one-word sequence loads a word, programs,
verifies, and finally increments the PC. See Figure 2-9.
A device Reset will clear the PC and set the address to
0xFFF.
increment the PC. The available commands are shown
in Table 2-1.
FIGURE 2-2:
TABLE 2-1:
© 2007 Microchip Technology Inc.
Load Data for Program Memory
Read Data from Program Memory
Increment Address
Begin Programming
End Programming
Bulk Erase Program Memory
ICSPCLK
ICSPDAT
V
V
DD
PP
The
FOUR-WORD PROGRAMMING
ONE-WORD PROGRAMMING
Increment
Command
COMMAND MAPPING FOR PIC16F57
T
PPDP
ENTERING HIGH
VOLTAGE PROGRAM/
VERIFY MODE
Address
T
HLD
0
command
x
x
x
x
x
x
Preliminary
will
x
x
x
x
x
x
Mapping (MSb … LSb)
0
0
0
1
1
1
2.4.3
The ICSPCLK pin is used for clock input and the
ICSPDAT pin is used for data input/output during serial
operation. To input a command, the clock pin is cycled
six times. Each command bit is latched on the falling
edge of the clock with the LSb of the command being
input first. The data must adhere to the setup (T
and hold (T
of the clock (see Table 5-1).
Commands that do not have data associated with them
are required to wait a minimum of T
from the falling edge of the last command clock to the
rising edge of the next command clock (see Table 5-1).
Commands that do have data associated with them
(Read and Load) are also required to wait T
between the command and the data segment
measured from the falling edge of the last command
clock to the rising edge of the first data clock. The data
segment, consisting of 16 clock cycles, can begin after
this delay.
The first and last clock pulses during the data segment
correspond to the Start and Stop bits, respectively.
Input data is a “don't care” during the Start and Stop
cycles. The 14 clock pulses between the Start and Stop
cycles clock the 14 bits of input/output data. Data is
transferred LSb first.
During Read commands, in which the data is output
from the PIC16F57, the ICSPDAT pin transitions from
the high-impedance state to the low-impedance output
state at the rising edge of the second data clock (first
clock edge after the Start cycle). The ICSPDAT pin
returns to the high-impedance state at the rising edge
of the 16th data clock (first edge of the Stop cycle). See
Figure 2-4.
The commands that are available are described in
Table 2-1.
Note:
0
1
1
0
1
0
HLD
SERIAL PROGRAM/VERIFY
OPERATION
After every End Programming command,
a time of T
1
0
1
0
1
0
1) times with respect to the falling edge
DIS
0
0
0
0
0
1
must be delayed.
0, data (14), 0
0, data (14), 0
Externally Timed
Internally Timed
PIC16F57
DS41208C-page 3
Data
DLY
2 measured
SET
DLY
1)
2