PIC12F617-I/SN Microchip Technology, PIC12F617-I/SN Datasheet - Page 24

• Manufacturer Part Number: PIC12F617-I/SN
• Description: IC MCU 8BIT 3.5KB FLASH 8SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F617-I/SN

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Controller Family/series: PIC12
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: SOIC
• Processor Series: PIC12F
• Core: PIC
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, ICE2000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC12F609/615/617/12HV609/615
2.2.2.7
The Alternate Pin Function Control (APFCON) register
is used to steer specific peripheral input and output
functions between different pins. For this device, the
P1A, P1B and Timer1 Gate functions can be moved
between different pins.
The APFCON register bits are shown in Register 2-7.
REGISTER 2-7:
DS41302D-page 24
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3-2
bit 1
bit 0
Note 1: PIC12F615/617/HV615 only.
U-0
—
2: Alternate pin function.
APFCON Register
(PIC12F615/617/HV615 only)
Unimplemented: Read as ‘0’
T1GSEL: TMR1 Input Pin Select bit
1 = T1G function is on GP3/T1G
0 = T1G function is on GP4/AN3/CIN1-/T1G/P1B
Unimplemented: Read as ‘0’
P1BSEL: P1B Output Pin Select bit
1 = P1B function is on GP4/AN3/CIN1-/T1G/P1B
0 = P1B function is on GP0/AN0/CIN+/P1B/ICSPDAT
P1ASEL: P1A Output Pin Select bit
1 = P1A function is on GP5/T1CKI/P1A
0 = P1A function is on GP2/AN2/T0CKI/INT/COUT/CCP1/P1A
U-0
—
APFCON:ALTERNATE PIN FUNCTION REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
—
T1GSEL
R/W-0
(2)
/MCLR/V
(2)
/OSC1/CLKIN
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PP
U-0
—
(2)
(2)
/OSC2/CLKOUT
/OSC2/CLKOUT
U-0
—
(1)
 2010 Microchip Technology Inc.
x = Bit is unknown
P1BSEL
R/W-0
P1ASEL
R/W-0
bit 0