ATTINY13A-SN Atmel, ATTINY13A-SN Datasheet - Page 43
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ATTINY13A-SN
Manufacturer Part Number
ATTINY13A-SN
Description
IC MCU AVR 1KB FLASH 20MHZ 8SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY13A-SSH.pdf
(176 pages)
Specifications of ATTINY13A-SN
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
1KB (512 x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Processor Series
ATTINY1x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
64 B
Interface Type
SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAKSTK511
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY13A-SN
Manufacturer:
MICROCHIP
Quantity:
3 000
8126E–AVR–07/10
This is useful for keeping the Watchdog Timer security while using the interrupt. To stay in Inter-
rupt and System Reset Mode, WDTIE must be set after each interrupt. This should however not
be done within the interrupt service routine itself, as this might compromise the safety-function of
the Watchdog System Reset mode. If the interrupt is not executed before the next time-out, a
System Reset will be applied.
Table 8-1.
Note:
• Bit 4 – WDCE: Watchdog Change Enable
This bit is used in timed sequences for changing WDE and prescaler bits. To clear the WDE bit,
and/or change the prescaler bits, WDCE must be set.
Once written to one, hardware will clear WDCE after four clock cycles.
• Bit 3 – WDE: Watchdog System Reset Enable
WDE is overridden by WDRF in MCUSR. This means that WDE is always set when WDRF is
set. To clear WDE, WDRF must be cleared first. This feature ensures multiple resets during con-
ditions causing failure, and a safe start-up after the failure.
• Bit 5, 2:0 – WDP[3:0]: Watchdog Timer Prescaler 3, 2, 1 and 0
The WDP[3:0] bits determine the Watchdog Timer prescaling when the Watchdog Timer is run-
ning. The different prescaling values and their corresponding time-out periods are shown in
Table 8-2 on page
Table 8-2.
WDP3
WDTON
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
1. WDTON fuse set to “0“ means programmed and “1“ means unprogrammed.
(1)
WDP2
0
0
0
0
1
1
1
1
0
0
Watchdog Timer Configuration
Watchdog Timer Prescale Select
WDE
43.
0
0
1
1
x
WDP1
0
0
1
1
0
0
1
1
0
0
WDP0
WDTIE
0
1
0
1
0
1
0
1
0
1
0
1
0
1
x
Number of WDT Oscillator
Mode
Stopped
Interrupt Mode
System Reset Mode
Interrupt and System Reset
Mode
System Reset Mode
1024K (1048576) cycles
128K (131072) cycles
256K (262144) cycles
512K (524288) cycles
16K (16384) cycles
32K (32768) cycles
64K (65536) cycles
2K (2048) cycles
4K (4096) cycles
8K (8192) cycles
Cycles
Action on Time-out
None
Interrupt
Reset
Interrupt, then go to System
Reset Mode
Reset
Typical Time-out at
V
CC
0.125 s
16 ms
32 ms
64 ms
0.25 s
0.5 s
1.0 s
2.0 s
4.0 s
8.0 s
= 5.0V
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