PIC16F57-I/SP Microchip Technology, PIC16F57-I/SP Datasheet - Page 2
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PIC16F57-I/SP
Manufacturer Part Number
PIC16F57-I/SP
Description
IC MCU FLASH 2KX12 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F54-ISS.pdf
(88 pages)
2.PIC16F57-ISS.pdf
(16 pages)
3.PIC16F57-ISO.pdf
(86 pages)
Specifications of PIC16F57-I/SP
Program Memory Type
FLASH
Program Memory Size
3KB (2K x 12)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
20
Ram Size
72 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
72 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
20
Number Of Timers
1
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
DV164120, DV164101, ICE2000
Minimum Operating Temperature
- 40 C
Data Rom Size
2 K
Height
3.3 mm
Length
34.67 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164001 - MODULE SKT PROMATEII 18/28DIP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC16F57
2.0
2.1
The user memory space extends from 0x000 to 0x7FF.
In Program/Verify mode, the program memory space
extends from 0x000 to 0xFFF, with the first half (0x000-
0x7FF) being user program memory and the second
half (0x800-0xFFF) being configuration memory. The
PC will increment from 0x000 to 0x7FF, then to 0x800
(not to 0x000).
In the configuration memory space, 0x800-0x83F are
physically implemented. However, only locations
0x800 through 0x803 are available. Other locations are
reserved.
2.2
A user may store identification information (ID) in four
user ID locations. The user ID locations are mapped in
[0x800: 0x803]. It is recommended that the user use
only the four Least Significant bits (LSb) of each user
ID location. The user ID locations read out normally,
even after code protection is enabled. It is recom-
mended that user ID locations are written as ‘xxxx
xxxx bbbb’ where ‘bbbb’ is user ID information.
The 12 bits may be programmed, but only the four LSbs
are displayed by MPLAB
care” bits and are not read by MPLAB IDE.
2.3
The Configuration Word is located at 0xFFF and is only
available upon Program mode entry. Once an Incre-
ment Address command is issued, the Configuration
Word is no longer accessible regardless of the address
of the program counter.
DS41208C-page 2
PROGRAM MODE ENTRY
User Program Memory Map
User ID Locations
Configuration Word
®
IDE. The xxxx’s are “don’t
Preliminary
FIGURE 2-1:
2.4
The Program/Verify mode is entered by holding pins
ICSPCLK and ICSPDAT low while raising V
V
this mode, the user program memory and configuration
memory can be accessed and programmed in serial
fashion. Clock and data are Schmitt Trigger input in this
mode.
The sequence that enters the device into the Program-
ming/Verify mode places all other logic into the Reset
state (the MCLR pin was initially at V
that all I/O are in the Reset state (high-impedance
inputs).
The PIC16F57 program memory may be written in two
ways. The fastest method writes four words at a time to
the program memory array. However, one-word writes
are also supported.
IL
to V
CALL, RETLW
DD
Program/Verify Mode
. Then raise V
User ID Locations
Configuration Word
Memory (Page 0)
Memory (Page 1)
Memory (Page 2)
Memory (Page 3)
On-chip Program
On-chip Program
On-chip Program
On-chip Program
Unimplemented
Stack Level 1
Stack Level 2
Reset Vector
PROGRAM MEMORY MAP
AND STACK
PC<10:0>
Reserved
© 2007 Microchip Technology Inc.
PP
from V
11
IL
to V
IL
). This means
000h
0FFh
100h
1FFh
200h
2FFh
300h
3FFh
400h
4FFh
500h
5FFh
600h
6FFh
700h
7FFh
800h-
803h
804h
83Fh
840h
FFEh
FFFh
IHH
DD
. Once in
pin from