ATTINY45-20SUR Atmel, ATTINY45-20SUR Datasheet - Page 86
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ATTINY45-20SUR
Manufacturer Part Number
ATTINY45-20SUR
Description
MCU AVR 4KB FLASH 20MHZ 8SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY45-20SUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATTINY45-20SU SL383
ATTINY45-20SU SL383
ATTINY45-20SU-SL383
Q4272203
ATTINY45-20SU SL383
ATTINY45-20SU-SL383
Q4272203
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12. 8-bit Timer/Counter1
12.1
12.2
86
Timer/Counter1 Prescaler
Counter and Compare Units
ATtiny25/45/85
The Timer/Counter1 is a general purpose 8-bit Timer/Counter module that has a separate pres-
caling selection from the separate prescaler.
Figure 12-1
nous clocking mode and an asynchronous clocking mode. The synchronous clocking mode uses
the system clock (CK) as the clock timebase and asynchronous mode uses the fast peripheral
clock (PCK) as the clock time base. The PCKE bit from the PLLCSR register enables the asyn-
chronous mode when it is set (‘1’).
Figure 12-1. Timer/Counter1 Prescaler
In the asynchronous clocking mode the clock selections are from PCK to PCK/16384 and stop,
and in the synchronous clocking mode the clock selections are from CK to CK/16384 and stop.
The clock options are described in
ister, TCCR1. Setting the PSR1 bit in GTCCR register resets the prescaler. The PCKE bit in the
PLLCSR register enables the asynchronous mode. The frequency of the fast peripheral clock is
64 MHz (or 32 MHz in Low Speed Mode).
The Timer/Counter1 general operation is described in the asynchronous mode and the opera-
tion in the synchronous mode is mentioned only if there are differences between these two
modes.
chronization delays in between registers. Note that all clock gating details are not shown in the
figure. The Timer/Counter1 register values go through the internal synchronization registers,
which cause the input synchronization delay, before affecting the counter operation. The regis-
ters TCCR1, GTCCR, OCR1A, OCR1B, and OCR1C can be read back right after writing the
register. The read back values are delayed for the Timer/Counter1 (TCNT1) register and flags
(OCF1A, OCF1B, and TOV1), because of the input and output synchronization.
The Timer/Counter1 features a high resolution and a high accuracy usage with the lower pres-
caling opportunities. It can also support two accurate, high speed, 8-bit Pulse Width Modulators
using clock speeds up to 64 MHz (or 32 MHz in Low Speed Mode). In this mode,
CK
PCKE
PCK 64/32 MHz
Figure 12-2
shows the Timer/Counter1 prescaler that supports two clocking modes, a synchro-
CS10
CS11
CS12
CS13
PSR1
shows Timer/Counter 1 synchronization register block diagram and syn-
T1CK
0
Table 12-5 on page 93
TIMER/COUNTER1 COUNT ENABLE
T/C PRESCALER
14-BIT
and the Timer/Counter1 Control Reg-
2586M–AVR–07/10
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