PIC16F1826-E/P Microchip Technology, PIC16F1826-E/P Datasheet - Page 179

MCU PIC 8BIT 2K FLASH 18-DIP

PIC16F1826-E/P

Manufacturer Part Number
PIC16F1826-E/P
Description
MCU PIC 8BIT 2K FLASH 18-DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F1826-E/P

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
3
Core
PIC
Processor Series
PIC16F
Data Bus Width
8 bit
Maximum Clock Frequency
32 MHz
Data Ram Size
256 B
On-chip Adc
Yes
Number Of Programmable I/os
15
Number Of Timers
3
Mounting Style
Through Hole
A/d Bit Size
10 bit
A/d Channels Available
12
Height
3.3 mm
Interface Type
I2C, SPI, UART
Length
22.86 mm
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.3 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
20.0
The Timer1 module is a 16-bit timer/counter with the
following features:
• 16-bit timer/counter register pair (TMR1H:TMR1L)
• Programmable internal or external clock source
• 2-bit prescaler
• Dedicated 32 kHz oscillator circuit
• Optionally synchronized comparator out
• Multiple Timer1 gate (count enable) sources
• Interrupt on overflow
• Wake-up on overflow (external clock,
• Time base for the Capture/Compare function
• Special Event Trigger (with CCP/ECCP)
• Selectable Gate Source Polarity
FIGURE 20-1:
 2010 Microchip Technology Inc.
Asynchronous mode only)
SYNCC1OUT
Comparator 1
Comparator 2
SYNCC2OUT
From Timer0
T1G
Overflow
T1GSS<1:0>
Note 1: ST Buffer is high speed type when using T1CKI.
TIMER1 MODULE WITH GATE
CONTROL
2: Timer1 register increments on rising edge.
3: Synchronize does not operate while in Sleep.
T1OSCEN
T1OSO
T1GPOL
T1CKI
T1OSI
Set flag bit
TMR1IF on
Overflow
00
10
11
TIMER1 BLOCK DIAGRAM
01
TMR1ON
T1GTM
T1OSC
TMR1H
EN
OUT
TMR1
(1)
T1G_IN
(2)
D
R
CK
TMR1L
Q
Q
1
0
Preliminary
TMR1CS<1:0>
Cap. Sensing
0
1
Oscillator
T1GGO/DONE
Q
Internal
Internal
F
OSC
Clock
Clock
F
OSC
EN
/4
D
• Gate Toggle Mode
• Gate Single-pulse Mode
• Gate Value Status
• Gate Event Interrupt
Figure 20-1 is a block diagram of the Timer1 module.
Single Pulse
Acq. Control
T1CLK
11
10
01
00
T1GSPM
PIC16F/LF1826/27
T1CKPS<1:0>
T1SYNC
Prescaler
1, 2, 4, 8
TMR1ON
0
1
To Clock Switching Modules
2
0
1
Internal
F
Clock
T1GVAL
OSC
TMR1GE
/2
Q1
Synchronized
Synchronize
Interrupt
clock input
D
EN
det
det
Sleep input
Q
(3)
To Comparator Module
DS41391C-page 179
Set
TMR1GIF
T1GCON
Data Bus
RD

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