PIC16F688-I/STG Microchip Technology, PIC16F688-I/STG Datasheet - Page 125

• Manufacturer Part Number: PIC16F688-I/STG
• Description: IC PIC MCU FLASH 4KX14 14TSSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-I/STG

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 14-TSSOP
• For Use With: XLT14SS-1 - SOCKET TRANSITION 14DIP/14SSOPAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.5
The WDT has the following features:
• Operates from the LFINTOSC (31 kHz)
• Contains a 16-bit prescaler
• Shares an 8-bit prescaler with Timer0
• Time-out period is from 1 ms to 268 seconds
• Configuration bit and software controlled
WDT is cleared under certain conditions described in
Table 11-7.
11.5.1
The WDT derives its time base from the 31 kHz
LFINTOSC. The LTS bit does not reflect that the
LFINTOSC is enabled.
The value of WDTCON is ‘---0 1000’ on all Resets.
This gives a nominal time base of 16 ms, which is
compatible with the time base generated with previous
PIC16F688 microcontroller versions.
FIGURE 11-9:
TABLE 11-7:
© 2009 Microchip Technology Inc.
WDTE = 0
CLRWDT Command
Oscillator Fail Detected
Exit Sleep + System Clock = T1OSC, EXTRC, INTRC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
LFINTOSC Clock
Note:
31 kHz
Watchdog Timer (WDT)
Note 1: This is the shared Timer0/WDT prescaler. See Section 5.1.3 “Software Programmable Prescaler” for more information.
WDT OSCILLATOR
When the Oscillator Start-up Timer (OST)
is invoked, the WDT is held in Reset,
because the WDT Ripple Counter is used
by the OST to perform the oscillator delay
count. When the OST count has expired,
the WDT will begin counting (if enabled).
WDT STATUS
WATCHDOG TIMER BLOCK DIAGRAM
WDTE from Configuration Word Register
SWDTEN from WDTCON
Conditions
16-bit WDT Prescaler
WDTPS<3:0>
From TMR0 Clock Source
A new prescaler has been added to the path between
the INTRC and the multiplexers used to select the path
for the WDT. This prescaler is 16 bits and can be
programmed to divide the INTRC by 32 to 65536,
giving the WDT a nominal range of 1 ms to 268s.
11.5.2
The WDTE bit is located in the Configuration Word
register. When set, the WDT runs continuously.
When the WDTE bit in the Configuration Word register
is set, the SWDTEN bit of the WDTCON register has no
effect. If WDTE is clear, then the SWDTEN bit can be
used to enable and disable the WDT. Setting the bit will
enable it and clearing the bit will disable it.
The PSA and PS<2:0> bits of the OPTION register
have the same function as in previous versions of the
PIC16F688 family of microcontrollers. See Section 5.0
“Timer0 Module” for more information.
0
1
WDT CONTROL
PSA
Cleared until the end of OST
WDT Time-out
0
PIC16F688
Prescaler
Cleared
1
WDT
8
DS41203E-page 123
(1)
PSA
PS<2:0>
To TMR0