ATTINY4313-SU Atmel, ATTINY4313-SU Datasheet - Page 3
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ATTINY4313-SU
Manufacturer Part Number
ATTINY4313-SU
Description
IC MCU AVR 4K FLASH 20SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY4313-SU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
ATTINYx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
2
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Controller Family/series
ATtiny
No. Of I/o's
18
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY4313-SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
1.1.4
1.1.5
1.1.6
1.1.7
1.1.8
8246AS–AVR–11/09
Port B (PB7..PB0)
Port D (PD6..PD0)
RESET
XTAL1
XTAL2
will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
Port A also serves the functions of various special features of the ATtiny2313A/4313 as listed on
page
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATtiny2313A/4313 as listed on
page
Port D is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port D output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port D also serves the functions of various special features of the ATtiny2313A/4313 as listed on
page
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running and provided that the reset pin has not been disabled. The
minimum pulse length is given in
generate a reset. The Reset Input is an alternate function for PA2 and dW.
The reset pin can also be used as a (weak) I/O pin.
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit. XTAL1
is an alternate function for PA0.
Output from the inverting Oscillator amplifier. XTAL2 is an alternate function for PA1.
61.
62.
66.
Table 21-3 on page
198. Shorter pulses are not guaranteed to
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