PIC16F631-I/SS Microchip Technology, PIC16F631-I/SS Datasheet - Page 8
![IC PIC MCU FLASH 1KX14 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F631-I/SS
Manufacturer Part Number
PIC16F631-I/SS
Description
IC PIC MCU FLASH 1KX14 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
5.PIC16F677-ISO.pdf
(294 pages)
Specifications of PIC16F631-I/SS
Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
17
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
658-1047-5 - BOARD EVALUATION ACCESSTOUCHXLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPXLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164307 - MODULE SKT FOR PM3 28SSOP
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F631-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16F631/677/685/687/689/690
FIGURE 8-3:
FIGURE 1:
DS80243M-page 8
A4 and previous revisions
FixedRef
CV
C2V
Rev. A5 CCP Output
REF
REN
C12IN0-
C12IN1-
C2IN2-
C2IN3-
C2CH<1:0>
C2IN+
0
1
CCP Output
MUX
SILICON REVISION A4 AND PREVIOUS VS. REVISION A5
CxOUT
COMPARATOR C2 SIMPLIFIED BLOCK DIAGRAM
C2R
CxIF
0
1
2
3
0
1
2
MUX
MUX
Uncertainty due to
Note 1:
Q1 cycle delay
2:
3:
C2V
C2V
When C2ON = 0, the C2 comparator will produce a ‘0’ output to the XOR Gate.
Q1 and Q3 are phases of the four-phase system clock (F
Q1 is held high during Sleep mode.
IN
IN
-
+
C2
C2ON
C2POL
Read CMxCON0
(1)
From TMR1
Q3*RD_CM2CON0
Clock
Q1
D
NRESET
C2OUT
D
EN
Uncertainty due to
Q
Q1 cycle delay
Q
C2SYNC
D
EN
C2POL
CL
0
1
MUX
Q
2010 Microchip Technology Inc.
Rev. A5: To ECCP
to Timer1 Gate, SR latch
and other peripherals
To ECCP Auto-Shutdown
Auto-Shutdown
Rev. A4 and previous:
RD_CM2CON0
OSC
Read CMxCON0
).
SYNCC2OUT
Set C2IF
Data Bus
To