PIC16F1936-E/SO Microchip Technology, PIC16F1936-E/SO Datasheet - Page 71

• Manufacturer Part Number: PIC16F1936-E/SO
• Description: IC PIC MCU FLASH 512KX14 28-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1936-E/SO

• Program Memory Type: FLASH
• Program Memory Size: 14KB (8K x 14)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Eeprom Size: 256 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: EUSART/MI2C/SPI
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 5
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

4.0
The PIC16F193X/LF193X device family features an
interruptible core, allowing certain events to preempt
normal program flow. An Interrupt Service Routine
(ISR) is used to determine the source of the interrupt
and act accordingly. Some interrupts can be configured
to wake the MCU from Sleep mode.
The PIC16F193X/LF193X device family has 23 inter-
rupt sources, differentiated by corresponding interrupt
enable and flag bits:
• External Edge Detect on INT Pin Interrupt
• Interrupt-on-Change Interrupt
• A/D Conversion Complete Interrupt
• EEPROM Write Complete Interrupt
• EUSART Receive Interrupt
• EUSART Transmit Interrupt
• LCD Module Interrupt
• Oscillator Fail Interrupt
FIGURE 4-1:
© 2008 Microchip Technology Inc.
INTERRUPTS
From Peripheral Interrupt
Logic (Figure 4-2)
INTERRUPT LOGIC
TMR0IF
TMR0IE
IOCIE
IOCIF
INTF
INTE
PEIE
GIE
Preliminary
• Timer0 Overflow Interrupt
• Timer1 Gate Interrupt
• Timer1 Overflow Interrupt
• Timer2 Match with PR2 Interrupt
• Timer4 Match with PR4 Interrupt
• Timer6 Match with PR6 Interrupt
• Comparator C1 Interrupt
• Comparator C2 Interrupt
• CCP1 Event Interrupt
• CCP2 Event Interrupt
• CCP3 Event Interrupt
• CCP4 Event Interrupt
• CCP5 Event Interrupt
• MSSP Event Interrupt
• MSSP Bus Collision Interrupt
A block diagram of the interrupt logic is shown in
Figure 4-1.
PIC16F193X/LF193X
Wake-up (If in Sleep mode)
Interrupt to CPU
DS41364A-page 69