ATMEGA48PA-PU Atmel, ATMEGA48PA-PU Datasheet - Page 44

MCU AVR 4KB FLASH IND 28PDIP

ATMEGA48PA-PU

Manufacturer Part Number
ATMEGA48PA-PU
Description
MCU AVR 4KB FLASH IND 28PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA48PA-PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
ATMEGA48x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
On-chip Dac
10 bit, 6 Channel
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA48PA-PU
Manufacturer:
ON
Quantity:
21 000
9.11
9.11.1
8271C–AVR–08/10
Register Description
SMCR – Sleep Mode Control Register
The Sleep Mode Control Register contains control bits for power management.
• Bits [7:4]: Reserved
These bits are unused in the ATmega48A/48PA/88A/88PA/168A/168PA/328/328P, and will
always be read as zero.
• Bits 3:1 – SM[2:0]: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in
Table 9-2.
Note:
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Bit
0x33 (0x53)
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
1. Standby mode is only recommended for use with external crystals or resonators.
Sleep Mode Select
R
7
0
SM1
0
0
1
1
0
0
1
1
R
6
0
R
5
0
SM0
0
1
0
1
0
1
0
1
R
4
0
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
Reserved
Reserved
Standby
External Standby
SM2
R/W
3
0
(1)
SM1
R/W
2
0
(1)
SM0
R/W
Table
1
0
9-2.
R/W
SE
0
0
SMCR
44

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