PIC16F628A-E/P Microchip Technology, PIC16F628A-E/P Datasheet - Page 121

• Manufacturer Part Number: PIC16F628A-E/P
• Description: IC MCU FLASH 2KX14 EEPROM 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F628A-E/P

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 18-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Eeprom Size: 128 x 8
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 128 B
• Height: 3.3 mm
• Length: 22.86 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: I3DBF648 - BOARD DAUGHTER ICEPIC3AC162053 - HEADER INTERFACE ICD,ICD2 18DIPACICE0202 - ADAPTER MPLABICE 18P 300 MIL
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

 2004 Microchip Technology Inc.
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Inclusive OR Literal with W
[ label ]
0
(W) .OR. k
Z
11
The contents of the W register is
OR’ed with the eight bit literal ‘k’.
The result is placed in the W
register.
1
1
IORLW
Before Instruction
After Instruction
Inclusive OR W with f
[ label ]
0
d
(W) .OR. (f)
Z
00
Inclusive OR the W register with
register ‘f’. If ‘d’ is 0 the result is
placed in the W register. If ‘d’ is
1 the result is placed back in
register ‘f’.
1
1
IORWF
Before Instruction
After Instruction
k
f
[0,1]
REG1 = 0x13
W
REG1 = 0x13
W
Z
127
255
W = 0x9A
W = 0xBF
Z = 0
1000
0x35
0100
REG1, 0
IORLW k
IORWF
= 0x91
= 0x93
= 1
(W)
(dest)
kkkk
dfff
f,d
kkkk
ffff
Preliminary
PIC16F627A/628A/648A
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Move Literal to W
[ label ]
0
k
None
11
The eight bit literal ‘k’ is loaded
into W register. The don’t cares
will assemble as 0’s.
1
1
MOVLW
After Instruction
Move f
[ label ]
0
d
(f)
Z
00
The contents of register f is
moved to a destination depen-
dent upon the status of d. If d =
0, destination is W register. If d
= 1, the destination is file regis-
ter f itself. d = 1 is useful to test
a file register since status flag Z
is affected.
1
1
MOVF
After Instruction
k
f
W= value in REG1 register
Z = 1
[0,1]
(W)
W = 0x5A
(dest)
127
255
00xx
0x5A
1000
REG1, 0
MOVLW k
MOVF f,d
DS40044B-page 119
kkkk
dfff
kkkk
ffff