ATTINY24A-SSU Atmel, ATTINY24A-SSU Datasheet - Page 20

MCU AVR 2K FLASH 20MHZ 14SOIC

ATTINY24A-SSU

Manufacturer Part Number
ATTINY24A-SSU
Description
MCU AVR 2K FLASH 20MHZ 14SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY24A-SSU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI, USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 20 Channel
For Use With
ATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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9. Datasheet Revision History
9.1
9.2
20
Rev. 8183C – 03/11
Rev. 8183B – 03/10
ATtiny24A/44A/84A
1. Added:
2. Updated:
1. Updated template.
2. Added UFBGA package (15CC1) in:
3. Separated typical characteristic plots, added
4. Updated sections:
5. Updated Figures:
6. Updated Tables:
– ATtiny84A, including typical characteristics plots
– Analog Comparator Offset plots for ATtiny24A
– Extended temperature part numbers in
– Bit syntax throughout the datasheet, e.g. from CS02:0 to CS0[2:0]
page
page
Section 3.3 “Capacitive Touch Sensing” on page 6
Table 6-8, “Capacitance of Low-Frequency Crystal Oscillator,” on page 28
ATtiny44A
270
Section 6.4 “Clock Output Buffer” on page
Table 16-4, “Single-Ended Input channel Selections,” on page
Internal 1.1V Reference
Table 19-16, “High-voltage Serial Programming Instruction Set for
ATtiny24A/44A/84A,” on page
Table 20-1, “DC Characteristics. T
Section 14.5.4 “USIBR – USI Buffer Register” on page
Section 24. “Ordering Information” on page
marking, updated notes
Figure 4-1 “Block Diagram of the AVR Architecture” on page 7
Figure 8-1 “Reset Logic” on page 38
Figure 14-1 “Universal Serial Interface, Block Diagram” on page
USIBR
Figure 19-5 “High-voltage Serial Programming Waveforms” on page 169
Table 19-11, “Minimum Wait Delay Before Writing the Next Flash or EEPROM
Location,” on page
2,
275.
Section 24. “Ordering Information” on page
(Figure 21.3.11 on page
164, updated value for t
170, adjusted notes
A
“Features” on page
236)
= -40°C to +85°C,” on page
Section 24. “Ordering Information” on page
30, changed CLKO to CKOUT
Section 21.2 “ATtiny24A” on page
WD_ERASE
270, added tape & reel and topside
(Figure 21.2.10 on page
270, and
1,
127, header updated
“Pin Configurations” on
Section 25.3 “15CC1” on
145, added note for
173, adjusted notes
116, USIDB ->
208) and
8183CS–AVR–03/11
183.

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