PIC18F26K20T-I/SS Microchip Technology, PIC18F26K20T-I/SS Datasheet - Page 2

• Manufacturer Part Number: PIC18F26K20T-I/SS
• Description: IC PIC MCU FLASH 32KX16 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K20T-I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: CCP, ECCP, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 64 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 11 Channel
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: PIC18F26K20T-I/SSTR

PIC18F26K20/46K20
TABLE 2:
DS80404E-page 2
ECCP
ECCP
MSSP SPI
MSSP SPI
MSSP (Master
I
EUSART
EUSART
System Clocks
Data EEPROM
Memory
Program Flash
Memory
PORTB Interrupt-
on-change
ADC
PORTB Interrupt-
on-change
Note 1:
2
C™ Mode)
Module
Only those issues indicated in the last column apply to the current silicon revision.
SILICON ISSUE SUMMARY
Full-Bridge
Full-Bridge
SPI Clock
SPI Master
I
OERR Flag
BAUDCON
HFINTOSC
Endurance
Endurance
Interrupt-on-
change
ADC Conversion
Interrupt-on-
change interrupt
when in Sleep
2
C™ Master
Feature
Number
Item
10.
12.
13.
11.
2.
5.
7.
8.
9.
1.
3.
4.
6.
1/F
Compromised Dead Band.
Improper handling of Stop event.
Clearing SPEN bit does not clear OERR
flag.
RCIDL may improperly stay low.
Frequency instability.
Endurance limited to 10K cycles.
Endurance limited to 1K cycles.
False interrupt when setting interrupt
enable.
ADC conversion may be limited to half
scale.
False interrupt when waking from
Sleep.
Dead band time is 4/F
Improper start in Timer2/2 Clock mode.
Improper sampling of last bit.
OSC
.
Issue Summary
OSC
instead of
 2010 Microchip Technology Inc.
Affected Revisions
B2
X
X
X
X
X
X
X
X
X
X
X
X
X
B3
X
X
X
X
X
X
X
X
X
X
X
X
B5
X
X
X
X
X
X
X
X
X
X
X
(1)