PIC16C712-20/SO Microchip Technology, PIC16C712-20/SO Datasheet - Page 21

IC MCU OTP 1KX14 A/D PWM 18SOIC

PIC16C712-20/SO

Manufacturer Part Number
PIC16C712-20/SO
Description
IC MCU OTP 1KX14 A/D PWM 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets

Specifications of PIC16C712-20/SO

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Number Of I /o
13
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC16C
No. Of I/o's
13
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
3.0
Some pins for these I/O ports are multiplexed with an
alternate function for the peripheral features on the
device. In general, when a peripheral is enabled, that
pin may not be used as a general purpose I/O pin.
Additional information on I/O ports may be found in the
PICmicro™
(DS33023).
3.1
PORTA is a 5-bit wide bi-directional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (=1) will make the corresponding PORTA pin
an input, (i.e., put the corresponding output driver in a
hi-impedance mode). Clearing a TRISA bit (=0) will
make the corresponding PORTA pin an output, (i.e., put
the contents of the output latch on the selected pin).
Reading the PORTA register reads the status of the
pins whereas writing to it will write to the port latch. All
write operations are read-modify-write operations.
Therefore a write to a port implies that the port pins are
read, the value is modified, and then written to the port
data latch.
FIGURE 3-1:
1998 Microchip Technology Inc.
I/O PORTS
PORTA and the TRISA Register
Mid-Range
BLOCK DIAGRAM OF RA3:RA0
DATA
BUS
WR
PORT
WR
TRIS
RD PORT
To A/D Converter
Reference
D
Data Latch
D
TRIS Latch
CK
CK
Manual,
Q
Q
Q
Q
RD TRIS
Preliminary
Q
EN
Pin RA4 is multiplexed with the Timer0 module clock
input to become the RA4/T0CKI pin. The RA4/T0CKI
pin is a Schmitt Trigger input and an open drain output.
All other RA port pins have TTL input levels and full
CMOS output drivers.
PORTA pins, RA3:0, are multiplexed with analog inputs
and analog V
selected by clearing/setting the control bits in the
ADCON1 register (A/D Control Register1).
The TRISA register controls the direction of the RA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 3-1:
BCF
CLRF
BSF
MOVLW
MOVWF
BCF
D
Note:
V
V
P
N
Analog
input
mode
SS
DD
STATUS, RP0
PORTA
STATUS, RP0
0xEF
TRISA
STATUS, RP0
V
SS
V
On a Power-on Reset, these pins are con-
figured as analog inputs and read as '0'.
DD
REF
PIC16C712/716
TTL
Input
Buffer
I/O pin
input. The operation of each pin is
INITIALIZING PORTA
;
; Initialize PORTA by
; clearing output
; data latches
; Select Bank 1
; Value used to
; initialize data
; direction
; Set RA<3:0> as inputs
; RA<4> as outputs
; Return to Bank 0
DS41106A-page 21

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