PIC16F1937-E/ML Microchip Technology, PIC16F1937-E/ML Datasheet - Page 31
![IC PIC MCU FLASH 512KX14 44-QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC16F1937-E/ML
Manufacturer Part Number
PIC16F1937-E/ML
Description
IC PIC MCU FLASH 512KX14 44-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(508 pages)
3.PIC16LF1933-ISS.pdf
(46 pages)
4.PIC16F1936-ISS.pdf
(2 pages)
5.PIC16F1936-ISS.pdf
(10 pages)
6.PIC16F1936-ISS.pdf
(40 pages)
7.PIC16F1936-ISS.pdf
(30 pages)
8.PIC16F1936-ISS.pdf
(12 pages)
9.PIC16LF1934-IML.pdf
(418 pages)
Specifications of PIC16F1937-E/ML
Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
44-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART/MI2C/SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
36
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
14-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
7.4
The checksum is calculated by two different methods
dependent on the setting of the CP Configuration bit.
TABLE 7-1:
EXAMPLE 7-1:
EXAMPLE 7-2:
© 2008 Microchip Technology Inc.
PIC16F1933
PIC16LF1933
PIC16F1934
PIC16LF1934
PIC16F1936
PIC16LF1936
PIC16F1937
PIC16LF1937
PIC16F1938
PIC16LF1938
PIC16F1939
PIC16LF1939
PIC16F1936
PIC16LF1936 Sum of Memory addresses 0000h-1FFFh
Note 1: In PIC16LF193X devices, the VCAPEN<1:0> bits are not implemented in Configuration Word 2 and the
Device
Checksum Computation
Configuration Word 2 mask is 3703h.
CONFIGURATION WORD
MASK VALUES
Configuration Word 2 mask
Checksum = 2534h + (2D83h and 3FFFh) + (3AFFh and 3703h)
Sum of Memory addresses 0000h-1FFFh
Configuration Word 1
Configuration Word 1 mask
Configuration Word 2
Configuration Word 2 mask
Checksum
Configuration Word 1
Configuration Word 1 mask
Configuration Word 2
Config. Word 1
CHECKSUM COMPUTED WITH PROGRAM CODE PROTECTION DISABLED
(PIC16F1936)
CHECKSUM COMPUTED WITH PROGRAM CODE PROTECTION DISABLED
(PIC16LF1936)
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
3FFFh
Mask
Config. Word 2
= 2534h + (2D83h and 3FFFh) + (3AEFh and 3733h)
= 2534h + 2D83h + 3223h
= 84DAh
= 2534h + 2D83h + 3203h
= 84BAh
3733h
3703h
3733h
3703h
3733h
3703h
3733h
3703h
3733h
3703h
3733h
3703h
Mask
Advance Information
(1)
7.4.1
With the program code protection disabled, the
checksum is computed by reading the contents of the
PIC16F193X/PIC16LF193X program memory locations
and adding up the program memory data starting at
address 0000h, up to the maximum user addressable
location (e.g., 1FFFH for the PIC16F1936). Any Carry
bit exceeding 16 bits are ignored. Additionally, the
relevant bits of the Configuration Words are added to
the checksum. All unimplemented Configuration bits
are masked to ‘0’.
PIC16F193X/LF193X
Note:
2534h
2D83h
3FFFh
3AEFh
3733h
2534h
2D83h
3FFFh
3AFFh
3703h
PROGRAM CODE PROTECTION
DISABLED
Data
checksum.
memory
does
DS41360A-page 31
not
effect
the