ATMEGA88PA-MMH Atmel, ATMEGA88PA-MMH Datasheet - Page 255

MCU AVR 8KB FLASH IND 28QFN

ATMEGA88PA-MMH

Manufacturer Part Number
ATMEGA88PA-MMH
Description
MCU AVR 8KB FLASH IND 28QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88PA-MMH

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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8271C–AVR–08/10
In Free Running mode, a new conversion will be started immediately after the conversion com-
pletes, while ADSC remains high. For a summary of conversion times, see
256.
Figure 23-4. ADC Timing Diagram, First Conversion (Single Conversion Mode)
Figure 23-5. ADC Timing Diagram, Single Conversion
Figure 23-6. ADC Timing Diagram, Auto Triggered Conversion
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
Cycle Number
ADC Clock
Trigger
Source
ADATE
ADIF
ADCH
ADCL
Cycle Number
ADC Clock
ADSC
ADIF
ADCH
ADCL
Cycle Number
ADC Clock
ADEN
ADSC
ADIF
ADCH
ADCL
Prescaler
Reset
1
1
2
MUX and REFS
Update
MUX and REFS
Update
1
2
MUX and REFS
Update
12
2
3
13
Sample & Hold
3
4
Sample &
Hold
14
4
5
15
5
6
Sample & Hold
16
6
First Conversion
17
7
One Conversion
18
7
8
One Conversion
19
8
9
20
9
10
Conversion
Complete
21
10
Conversion
11
Complete
22
Conversion
Complete
11
23
12
24
12
13
25
13
Sign and MSB of Result
Sign and MSB of Result
LSB of Result
Table 23-1 on page
Next Conversion
Sign and MSB of Result
1
Next
Conversion
1
LSB of Result
LSB of Result
2
2
MUX and REFS
Update
Next Conversion
MUX and REFS
Update
1
Prescaler
Reset
3
3
2
255

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