PIC16F1933-I/SS Microchip Technology, PIC16F1933-I/SS Datasheet - Page 7

• Manufacturer Part Number: PIC16F1933-I/SS
• Description: IC MCU 8BIT FLASH 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1933-I/SS

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SSOP
• Controller Family/series: PIC16F
• No. Of I/o's: 25
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FIGURE 1:
EXAMPLE 1:
For other combinations of F
Instruction cycle delay counts, refer to
 2010 Microchip Technology Inc.
BSF
BCF
MOVF
Note:
F
T
T
See the ADC Clock Period (T
section of the device data sheet.
In
required to complete the full conversion. Each T
cycle consists of 8 T
provided to stop the A/D conversion after 86
instruction cycles and terminate the conversion at
the correct time as shown in the figure above.
CY
AD
OSC
Figure
= 4/32 MHz = 125 nsec
= 1 µsec, ADCS = F
ADCON0, ADGO
ADCON0, ADGO
ADRESH, W
= 32 MHz
The exact delay time will depend on the
T
counts shown in the timing diagram above
apply to this example only. Refer to
Table 4
other configurations.
4 T
AD
8 T
1 T
1, 88 instruction cycles (T
CY
CY
divisor (ADCS) selection. The T
AD
for the required delay counts for
CODE EXAMPLE OF
INSTRUCTION CYCLE
DELAY
INSTRUCTION CYCLE DELAY CALCULATION EXAMPLE
CY
; Start ADC conversion
; Provide 86
; Terminate the
; Read conversion
OSC
instruction cycle
delay here
conversion manually
result
periods. A fixed delay is
OSC
/32
AD
, T
) vs. Device Operating Frequencies table, in the Analog-to-Digital Converter
88 T
AD
Table
11 T
84 T
CY
values and
CY
4.
AD
CY
) will be
CY
AD
TABLE 4:
F
F
F
Affected Silicon Revisions
OSC
OSC
OSC
A1
T
X
AD
/64
/32
/16
A2
X
PIC16F/LF1933
INSTRUCTION CYCLE DELAY
COUNTS BY T
A3
Instruction Cycle Delay Counts
X
Stop the A/D conversion
between 10.5 and 11 T
cycles.
See the Analog-to-Digital
Conversion Timing diagram
in
Converter chapter of the
device data sheet.
A4
the
AD
172
Analog-to-Digital
86
43
SELECTION
DS80490F-page 7
AD