ATMEGA8515-16AUR Atmel, ATMEGA8515-16AUR Datasheet - Page 51
ATMEGA8515-16AUR
Manufacturer Part Number
ATMEGA8515-16AUR
Description
MCU AVR 8KB FLASH 16MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8515L-8MC.pdf
(257 pages)
Specifications of ATMEGA8515-16AUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
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Watchdog Timer Control
Register – WDTCR
2512K–AVR–01/10
Table 20. WDT Configuration as a Function of the Fuse Settings of S8515C and
WDTON.
Figure 28. Watchdog Timer
• Bits 7..5 – Res: Reserved Bits
These bits are reserved bits in the ATmega8515 and will always read as zero.
• Bit 4 – WDCE: Watchdog Change Enable
This bit must be set when the WDE bit is written to logic zero. Otherwise, the Watchdog
will not be disabled. Once written to one, hardware will clear this bit after four clock
cycles. Refer to the description of the WDE bit for a Watchdog disable procedure. In
Safety Levels 1 and 2, this bit must also be set when changing the prescaler bits. See
“Timed Sequences for Changing the Configuration of the Watchdog Timer” on page 53.
• Bit 3 – WDE: Watchdog Enable
When the WDE is written to logic one, the Watchdog Timer is enabled, and if the WDE is
written to logic zero, the Watchdog Timer function is disabled. WDE can only be cleared
if the WDCE bit has logic level one. To disable an enabled Watchdog Timer, the follow-
ing procedure must be followed:
Bit
Read/Write
Initial Value
S8515C
Unprogrammed
Unprogrammed
Programmed
Programmed
R
7
–
0
WDTON
Unprogrammed
Programmed
Unprogrammed
Programmed
R
OSCILLATOR
6
–
0
WATCHDOG
R
5
–
0
Safety
Level
1
2
0
2
WDCE
R/W
4
0
WDT
Initial
State
Disabled
Enabled
Disabled
Enabled
WDE
R/W
3
0
How to Disable
the WDT
Timed sequence
Always enabled
Timed sequence
Always enabled
WDP2
R/W
2
0
ATmega8515(L)
WDP1
R/W
1
0
WDP0
R/W
How to
Change Time-
out
Timed
sequence
Timed
sequence
No restriction
Timed
sequence
0
0
WDTCR
51
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