PIC16F1946-E/PT Microchip Technology, PIC16F1946-E/PT Datasheet - Page 443
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PIC16F1946-E/PT
Manufacturer Part Number
PIC16F1946-E/PT
Description
MCU 8BIT 8K FLASH 64TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16F722-ISS.pdf
(8 pages)
2.PIC16LF1933-ISS.pdf
(46 pages)
3.PIC16LF1946-IPT.pdf
(448 pages)
4.PIC16LF1946-IPT.pdf
(6 pages)
5.PIC16F1946-IPT.pdf
(8 pages)
6.PIC16F1946-EPT.pdf
(440 pages)
Specifications of PIC16F1946-E/PT
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TFQFP
Controller Family/series
PIC16F
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
32MHz
No. Of Timers
5
Interface
EUSART, I2C, SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F1946-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F722-ISS PDF datasheet
- PIC16LF1933-ISS PDF datasheet #2
- PIC16LF1946-IPT PDF datasheet #3
- PIC16LF1946-IPT PDF datasheet #4
- PIC16F1946-IPT PDF datasheet #5
- PIC16F1946-EPT PDF datasheet #6
- Current page: 443 of 448
- Download datasheet (4Mb)
2010 Microchip Technology Inc.
A/D Conversion (Sleep Mode) .................................. 413
Acknowledge Sequence ........................................... 282
Asynchronous Reception .......................................... 305
Asynchronous Transmission..................................... 300
Asynchronous Transmission (Back to Back) ............ 301
Auto Wake-up Bit (WUE) During Normal Operation . 315
Auto Wake-up Bit (WUE) During Sleep .................... 315
Automatic Baud Rate Calculator............................... 314
Baud Rate Generator with Clock Arbitration ............. 275
BRG Reset Due to SDA Arbitration During Start
Brown-out Reset (BOR) ............................................ 409
Brown-out Reset Situations ........................................ 81
Bus Collision During a Repeated Start Condition
Bus Collision During a Repeated Start Condition
Bus Collision During a Start Condition (SCL = 0) ..... 286
Bus Collision During a Stop Condition (Case 1) ....... 288
Bus Collision During a Stop Condition (Case 2) ....... 288
Bus Collision During Start Condition (SDA only) ...... 285
Bus Collision for Transmit and Acknowledge............ 284
CLKOUT and I/O....................................................... 407
Clock Synchronization .............................................. 272
Clock Timing ............................................................. 405
Comparator Output ................................................... 177
Enhanced Capture/Compare/PWM (ECCP) ............. 411
Fail-Safe Clock Monitor (FSCM) ................................. 74
First Start Bit Timing ................................................. 276
Full-Bridge PWM Output ........................................... 227
Half-Bridge PWM Output .................................. 225, 232
I
I
I
I
I
INT Pin Interrupt.......................................................... 91
Internal Oscillator Switch Timing................................. 69
LCD Interrupt Timing in Quarter-Duty Cycle Drive.... 364
LCD Sleep Entry/Exit when SLPEN = 1 or CS = 00 . 366
PWM Auto-shutdown ................................................ 231
PWM Direction Change ............................................ 228
PWM Direction Change at Near 100% Duty Cycle ... 229
PWM Output (Active-High)........................................ 223
PWM Output (Active-Low) ........................................ 224
Repeat Start Condition.............................................. 277
Reset Start-up Sequence............................................ 83
Reset, WDT, OST and Power-up Timer ................... 408
Send Break Character Sequence ............................. 316
SPI Master Mode (CKE = 1, SMP = 1) ..................... 416
SPI Mode (Master Mode).......................................... 249
SPI Slave Mode (CKE = 0) ....................................... 417
SPI Slave Mode (CKE = 1) ....................................... 417
Synchronous Reception (Master Mode, SREN) ....... 321
Synchronous Transmission....................................... 318
Synchronous Transmission (Through TXEN) ........... 318
Timer0 and Timer1 External Clock ........................... 410
Timer1 Incrementing Edge........................................ 201
Two Speed Start-up .................................................... 72
Type-A in 1/2 Mux, 1/2 Bias Drive ............................ 353
Type-A in 1/2 Mux, 1/3 Bias Drive ............................ 355
Type-A in 1/3 Mux, 1/2 Bias Drive ............................ 357
Type-A in 1/3 Mux, 1/3 Bias Drive ............................ 359
Type-A in 1/4 Mux, 1/3 Bias Drive ............................ 361
2
2
2
2
2
C Bus Data ............................................................. 419
C Bus Start/Stop Bits.............................................. 418
C Master Mode (7 or 10-Bit Transmission) ............ 279
C Master Mode (7-Bit Reception)........................... 281
C Stop Condition Receive or Transmit Mode ......... 283
Condition........................................................... 286
(Case 1) ............................................................ 287
(Case 2) ............................................................ 287
Firmware Restart .............................................. 231
Preliminary
Timing Diagrams and Specifications
Timing Parameter Symbology .......................................... 404
Timing Requirements
TMR0 Register.................................................................... 33
TMR1H Register ................................................................. 33
TMR1L Register.................................................................. 33
TMR2 Register.............................................................. 33, 41
TRIS ................................................................................. 388
TRISA Register........................................................... 34, 128
TRISB ............................................................................... 130
TRISB Register........................................................... 34, 131
TRISC ............................................................................... 133
TRISC Register........................................................... 34, 134
TRISD ............................................................................... 136
TRISD Register........................................................... 34, 137
TRISE ............................................................................... 139
TRISE Register........................................................... 34, 140
TRISF ............................................................................... 142
TRISF Register ........................................................... 39, 144
TRISG............................................................................... 146
TRISG Register .......................................................... 39, 147
Two-Speed Clock Start-up Mode........................................ 71
TX2REG Register ............................................................... 42
TX2STA Register................................................................ 42
TXCON (Timer2/4/6) Register .......................................... 211
TXREG ............................................................................. 299
TXREG Register ................................................................. 36
TXSTA Register.......................................................... 36, 306
U
USART
V
V
W
Wake-up on Break ............................................................ 314
Wake-up Using Interrupts ................................................. 106
Watchdog Timer (WDT)...................................................... 82
WCOL ....................................................... 275, 278, 280, 282
WCOL Status Flag.................................... 275, 278, 280, 282
WDTCON Register ........................................................... 109
WPUB Register................................................................. 132
WPUG Register ................................................................ 148
Write Protection .................................................................. 59
REF
Type-A/Type-B in Static Drive .................................. 352
Type-B in 1/2 Mux, 1/2 Bias Drive ............................ 354
Type-B in 1/2 Mux, 1/3 Bias Drive ............................ 356
Type-B in 1/3 Mux, 1/2 Bias Drive ............................ 358
Type-B in 1/3 Mux, 1/3 Bias Drive ............................ 360
Type-B in 1/4 Mux, 1/3 Bias Drive ............................ 362
USART Synchronous Receive (Master/Slave) ......... 415
USART Synchronous Transmission (Master/Slave). 414
Wake-up from Interrupt............................................. 106
PLL Clock ................................................................. 406
I
I2C Bus Start/Stop Bits............................................. 419
SPI Mode.................................................................. 418
BRGH Bit .................................................................. 309
Synchronous Master Mode
. S
Modes....................................................................... 108
Specifications ........................................................... 410
2
C Bus Data............................................................. 420
EE
PIC16F/LF1946/47
Requirements, Synchronous Receive .............. 415
Requirements, Synchronous Transmission...... 415
Timing Diagram, Synchronous Receive ........... 415
Timing Diagram, Synchronous Transmission... 414
ADC Reference Voltage
DS41414B-page 443
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