PIC12C672-04E/MF Microchip Technology, PIC12C672-04E/MF Datasheet - Page 303
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PIC12C672-04E/MF
Manufacturer Part Number
PIC12C672-04E/MF
Description
IC PIC MCU 2KX14 8DFN
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C672-04E/MF
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DFN
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFNXLT08DFN - SOCKET TRANSITION ICE 8DFNAC164032 - ADAPTER PICSTART PLUS 8DFN/DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
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17.4.3
17.4.4
INTCON
PIR
PIE
SSPADD
SSPBUF
SSPCON1 WCOL
SSPCON2 GCEN ACKSTAT ACKDT ACKEN RCEN
SSPSTAT
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'.
Note 1: The position of these bits is device dependent.
1997 Microchip Technology Inc.
Name
2: These bits may also be named GPIE and GPIF.
Shaded cells are not used by the SSP in I
Sleep Operation
Effect of a Reset
Synchronous Serial Port (I
Address Register (slave mode)/Baud Rate Generator (master mode)
Synchronous Serial Port Receive Buffer/Transmit Register
Bit 7
SMP
GIE
While in sleep mode, the I
or complete byte transfer occurs wake the processor from sleep (if the MSSP interrupt is
enabled).
A reset disables the MSSP module and terminates the current transfer.
Table 17-3: Registers Associated with I
SSPOV
PEIE
Bit 6
CKE
SSPEN
Bit 5
T0IE
D/A
2
SSPIE, BCLIF
C mode)
SSPIF, BCLIF
INTE
Bit 4
CKP
P
2
C module can receive addresses or data, and when an address match
Preliminary
2
SSPM3 SSPM2 SSPM1 SSPM0 0000 0000
RBIE
C mode.
Bit 3
S
(1)
(2)
(1)
Bit 2
T0IF
PEN
R/W
2
C Operation
Section 17. MSSP
RSEN
INTF
Bit 1
UA
RBIF
Bit 0
SEN
BF
(2)
0000 0000
0000 0000
xxxx xxxx
0000 0000
0000 0000
Value on
POR,
BOR
0, 0
0, 0
DS31017A-page 17-27
other resets
Value on all
0000 0000
0000 0000
uuuu uuuu
0000 0000
0000 0000
0000 0000
0, 0
0, 0
17
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