ATMEGA88P-20AUR Atmel, ATMEGA88P-20AUR Datasheet - Page 185
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ATMEGA88P-20AUR
Manufacturer Part Number
ATMEGA88P-20AUR
Description
MCU AVR 8KB FLASH 20MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA168P-20AU.pdf
(420 pages)
Specifications of ATMEGA88P-20AUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Company
Part Number
Manufacturer
Quantity
Price
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19.7.2
8025L–AVR–7/10
Receiving Frames with 9 Data Bits
bits of the data read from the UDRn will be masked to zero. The USART has to be initialized
before the function can be used.
Note:
The function simply waits for data to be present in the receive buffer by checking the RXCn Flag,
before reading the buffer and returning the value.
If 9-bit characters are used (UCSZn=7) the ninth bit must be read from the RXB8n bit in
UCSRnB before reading the low bits from the UDRn. This rule applies to the FEn, DORn and
UPEn Status Flags as well. Read status from UCSRnA, then data from UDRn. Reading the
UDRn I/O location will change the state of the receive buffer FIFO and consequently the TXB8n,
FEn, DORn and UPEn bits, which all are stored in the FIFO, will change.
The following code example shows a simple USART receive function that handles both nine bit
characters and the status bits.
Assembly Code Example
C Code Example
USART_Receive:
unsigned char USART_Receive( void )
{
}
; Wait for data to be received
sbis UCSRnA, RXCn
rjmp USART_Receive
; Get and return received data from buffer
in
ret
/* Wait for data to be received */
while ( !(UCSRnA & (1<<RXCn)) )
/* Get and return received data from buffer */
return UDRn;
1.
See ”About Code Examples” on page 8.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”
instructions must be replaced with instructions that allow access to extended I/O. Typically
“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
r16, UDRn
;
(1)
(1)
ATmega48P/88P/168P
185
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