PIC16LC771/P Microchip Technology, PIC16LC771/P Datasheet - Page 22
![IC MCU OTP 4KX14 A/D PWM 20DIP](/photos/12/13/121303/150-20-dip_sml.jpg)
PIC16LC771/P
Manufacturer Part Number
PIC16LC771/P
Description
IC MCU OTP 4KX14 A/D PWM 20DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC771/P
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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PIC16C717/770/771
2.2.2.7
This register contains the SSP Bus Collision and low-
voltage detect interrupt flag bits.
REGISTER 2-7:
DS41120B-page 20
bit 7
bit 6-4
bit 3
bit 2-0
PIR2 REGISTER
PERIPHERAL INTERRUPT REGISTER 2 (PIR2: 0Dh)
bit 7
LVDIF: Low Voltage Detect Interrupt Flag bit
1 = The supply voltage has fallen below the specified LVD voltage (must be cleared in software)
0 = The supply voltage is greater than the specified LVD voltage
Unimplemented: Read as '0'
BCLIF: Bus Collision Interrupt Flag bit
1 = A bus collision has occurred while the SSP module configured in I
0 = No bus collision occurred
Unimplemented: Read as '0'
Legend:
R = Readable bit
- n = Value at POR
R/W-0
LVDIF
transmitting (must be cleared in software)
U-0
—
U-0
—
W = Writable bit
’1’ = Bit is set
U-0
—
.
Note:
R/W-0
BCLIF
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
Interrupt flag bits get set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
U-0
—
2002 Microchip Technology Inc.
2
C Master was
x = Bit is unknown
U-0
—
U-0
—
bit 0
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