PIC16C716-20E/SO Microchip Technology, PIC16C716-20E/SO Datasheet
![IC MCU OTP 2KX14 A/D PWM 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16C716-20E/SO
Specifications of PIC16C716-20E/SO
Related parts for PIC16C716-20E/SO
PIC16C716-20E/SO Summary of contents
Page 1
... CMOS Microcontrollers with A/D Converter and Capture/Compare/PWM © 2005 Microchip Technology Inc. PIC16C712/716 Data Sheet DS41106B ...
Page 2
... PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
Page 3
... CMOS Microcontrollers with A/D Converter and Capture/Compare/PWM Devices included in this Data Sheet: • PIC16C712 • PIC16C716 Microcontroller Core Features: • High-performance RISC CPU • Only 35 single-word instructions to learn • All single-cycle instructions except for program branches which are two cycle • ...
Page 4
... DIP, 18-pin DIP, 18-pin DIP, SOIC SOIC; SOIC; SOIC; 20-pin SSOP 20-pin SSOP 20-pin SSOP PIC16C716 DC – 20 MHz POR, BOR (PWRT, OST) 2K 128 7 Ports A input channels PIC16C716 PIC16C72A PIC16C73B 128 128 192 TMR0 TMR0 TMR0 TMR1 TMR1 TMR1 TMR2 TMR2 TMR2 ...
Page 5
... When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are using. Customer Notification System Register on our web site at www.microchip.com to receive the most current information on all of our products. © 2005 Microchip Technology Inc. PIC16C712/716 DS41106B-page 3 ...
Page 6
... PIC16C712/716 NOTES: DS41106B-page 4 © 2005 Microchip Technology Inc. ...
Page 7
... Timer1 CCP1 Note 1: Higher order bits are from the STATUS register. © 2005 Microchip Technology Inc. There are two devices (PIC16C712, PIC16C716) covered by this data sheet. Figure 1-1 is the block diagram for both devices. The ® pinouts are listed in Table 1-1. ...
Page 8
... OSC1, and denotes the instruction cycle rate. Digital I/O Analog input 0 Digital I/O Analog input 1 Digital I/O Analog input 2 Digital I/O Analog input 3 A/D Reference Voltage input. Digital I/O. Open drain when configured as output. Timer0 external clock input © 2005 Microchip Technology Inc. ...
Page 9
... ST = Schmitt Trigger input with CMOS levels OD = Open drain output SM = SMBus compatible input. An external resistor is required if this pin is used as an output NPU = N-channel pull-up No-P diode = No P-diode input P = Power © 2005 Microchip Technology Inc. Pin Buffer Type Type Description PORTB is a bidirectional I/O port. PORTB can be software programmed for internal weak pull-ups on all inputs ...
Page 10
... PIC16C712/716 NOTES: DS41106B-page 8 © 2005 Microchip Technology Inc. ...
Page 11
... The PIC16C712/716 has a 13-bit Program Counter (PC) capable of addressing program mem- ory space. PIC16C712 has words of program memory and PIC16C716 has words of program memory. Accessing a location above the physically implemented address will cause a wraparound. The Reset vector is at 0000h and the interrupt vector is at 0004h ...
Page 12
... General Purpose General Registers Purpose 32 Bytes Registers 96 Bytes 7Fh Bank 0 Bank 1 Unimplemented data memory locations, read as ‘0’. Note 1: Not a physical register. © 2005 Microchip Technology Inc. File Address 80h 81h 82h 83h 84h 85h 86h 87h 88h 89h 8Ah 8Bh ...
Page 13
... On any device Reset, these pins are configured as inputs. 6: This is the value that will be in the port output latch. 7: Reserved bits; Do Not Use. © 2005 Microchip Technology Inc. PIC16C712/716 The Special Function Registers can be classified into two sets; core (CPU) and peripheral. Those registers associated with the core functions are described in detail in this section ...
Page 14
... TT1CK xxxx x1x1 xxxx x1x1 — — ---0 0000 ---0 0000 INTF RBIF 0000 000x 0000 000u TMR2IE TMR1IE -0-- -000 -0-- -000 — — POR BOR ---- --qq ---- --uu — — 1111 1111 1111 1111 — — PCFG1 PCFG0 ---- -000 ---- -000 © 2005 Microchip Technology Inc. ...
Page 15
... Note: For borrow the polarity is reversed. A subtraction is executed by adding the two’s complement of the second operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the source register. © 2005 Microchip Technology Inc. PIC16C712/716 It is recommended, therefore, that only BCF, BSF, ...
Page 16
... To achieve a 1:1 prescaler assignment for the TMR0 register, assign the prescaler to the Watchdog Timer. R/W-1 R/W-1 R/W-1 R/W-1 PSA PS2 PS1 PS0 128 R = Readable bit W = Writable bit bit0 U = Unimplemented bit, read as ‘0’ Value at POR Reset © 2005 Microchip Technology Inc. ...
Page 17
... RBIF: RB Port Change Interrupt Flag bit least one of the RB7:RB4 pins changed state (must be cleared in software None of the RB7:RB4 pins have changed state © 2005 Microchip Technology Inc. PIC16C712/716 Note: Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...
Page 18
... Disables the TMR1 overflow interrupt DS41106B-page 16 Note: Bit PEIE (INTCON<6>) must be set to enable any peripheral interrupt. R/W-0 R/W-0 R/W-0 R/W-0 — CCP1IE TMR2IE TMR1IE bit0 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR Reset © 2005 Microchip Technology Inc. ...
Page 19
... No TMR2 to PR2 match occurred bit 0: TMR1IF: TMR1 Overflow Interrupt Flag bit 1 = TMR1 register overflowed (must be cleared in software TMR1 register did not overflow © 2005 Microchip Technology Inc. PIC16C712/716 Note: Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...
Page 20
... BOR must then be set by the user and checked on subsequent resets to see clear, indicating a brown-out has occurred. U-0 U-0 R/W-0 R/W-q — — POR BOR bit0 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR Reset © 2005 Microchip Technology Inc. ...
Page 21
... After the stack has been PUSHed eight times, the ninth push overwrites the value that was stored from the first push. The tenth push overwrites the second push (and so on). © 2005 Microchip Technology Inc. PIC16C712/716 2.4 Program Memory Paging The CALL and GOTO instructions provide 11 bits of address to allow branching within any 2K program memory page ...
Page 22
... Bank 1 Bank 2 Bank 3 HOW TO CLEAR RAM USING INDIRECT ADDRESSING 0x20 ;initialize pointer FSR ; to RAM INDF ;clear INDF register FSR ;inc pointer FSR,4 ;all done? NEXT ;NO, clear next ;YES, continue Indirect Addressing 7 0 FSR register location select © 2005 Microchip Technology Inc. ...
Page 23
... Therefore, a write to a port implies that the port pins are read, the value is modified, and then written to the port data latch. © 2005 Microchip Technology Inc. PIC16C712/716 Pin RA4 is multiplexed with the Timer0 module clock input to become the RA4/T0CKI pin. The RA4/T0CKI pin is a Schmitt Trigger input and an open drain output ...
Page 24
... BLOCK DIAGRAM OF RA4/T0CKI PIN DATA BUS WR PORT WR TRIS RD PORT TMR0 Clock Input DS41106B-page Data Latch Analog input TRIS Latch mode RD TRIS I/O Pin N Data Latch Schmitt Q CK Trigger Input TRIS Latch Buffer RD TRIS I/O pin TTL Input Buffer © 2005 Microchip Technology Inc. ...
Page 25
... ADCON1 — — Legend unknown unchanged, — = unimplemented locations read as ‘0’. Shaded cells are not used by PORTA. Note 1: Reserved bits; Do Not Use. © 2005 Microchip Technology Inc. Function Input/output or analog input Input/output or analog input Input/output or analog input Input/output or analog input or V ...
Page 26
... The pull-ups are disabled on a Power-on Reset weak P pull-up Data Latch TRIS Latch TTL Input CK Buffer RD TRIS PORT Schmitt Trigger RD PORT Buffer I/O pin © 2005 Microchip Technology Inc. ...
Page 27
... TMR1CS RD PORTB Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). © 2005 Microchip Technology Inc. PORTB. The “mismatch” outputs of RB7:RB4 are OR’ed together to generate the RB Port Change Interrupt with flag bit RBIF (INTCON<0>). ...
Page 28
... CK Q TRISB CCPON RD PORTB Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). DS41106B-page weak P pull- TTL Buffer (1) RBPU CCPON weak P pull- TTL Buffer RB1/T1OSO/T1CKI CCPIN V DD RB3/CCP1 V SS © 2005 Microchip Technology Inc. ...
Page 29
... TTL/ST Legend: TTL = TTL input Schmitt Trigger input Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt or peripheral input. 2: This buffer is a Schmitt Trigger input when used in Serial Programming mode. © 2005 Microchip Technology Inc. PIC16C712/716 V DD weak ...
Page 30
... Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RB5 RB4 RB3 RB2 RB1 RB0 T0CS T0SE PSA PS2 PS1 PS0 Value on: Value on all POR, other Resets BOR xxxx xxxx uuuu uuuu 1111 1111 1111 1111 1111 1111 1111 1111 © 2005 Microchip Technology Inc. ...
Page 31
... T0SE (1) T0CS Note 1: T0CS, T0SE, PSA, PS2:PS0 (OPTION_REG<5:0>). 2: The prescaler is shared with Watchdog Timer (refer to Figure 4-2 for detailed block diagram). © 2005 Microchip Technology Inc. Additional information on external clock requirements is available in the PICmicro Manual, (DS33023). 4.2 Prescaler An 8-bit counter is available as a prescaler for the Timer0 module postscaler for the Watchdog Timer, respectively (Figure 4-2) ...
Page 32
... Data Bus 8 TMR0 Reg Set flag bit T0IF on Overflow Value on: Value on all Bit 1 Bit 0 POR, other Resets BOR xxxx xxxx uuuu uuuu INTF RBIF 0000 000x 0000 000u PS1 PS0 1111 1111 1111 1111 --11 1111 --11 1111 © 2005 Microchip Technology Inc. ...
Page 33
... External clock from pin RB1/T1OSO/T1CKI (on the rising edge Internal clock (F /4) OSC bit 0: TMR1ON: Timer1 On bit 1 = Enables Timer1 0 = Stops Timer1 © 2005 Microchip Technology Inc. PIC16C712/716 5.1 Timer1 Operation Timer1 can operate in one of these modes: • timer • synchronous counter • asynchronous counter The operating mode is determined by the clock select bit, TMR1CS (T1CON< ...
Page 34
... Table 5-1 shows the details of Timer1 mode selections, control bit settings, TMR1 and PORTB operations. DS41106B-page 32 0 TMR1L 1 TMR1ON T1SYNC on/off 1 Prescaler T1OSCEN F /4 OSC Enable Internal 0 (1) Oscillator Clock T1CKPS1:T1CKPS0 TMR1CS Synchronized clock input Synchronize det 2 Sleep input © 2005 Microchip Technology Inc. ...
Page 35
... OSC Counter External circuit T1CON = --xx 0x11 TR1SCCP = ---- -x-1 Firmware T1CON = --xx 0x11 TR1SCCP = ---- -x-0 Timer1 oscillator T1CON = --xx 1x11 © 2005 Microchip Technology Inc. PIC16C712/716 TMR1 Module Operation PORTB<2:1> Operation Off PORTB<2:1> function as normal I/O TMR1 module uses the main PORTB<2:1> function as normal oscillator as clock source ...
Page 36
... TCCP — Value on Value on Bit 0 POR, all other BOR Resets 0000 000x 0000 000u RBIF -0-- -000 -0-- -000 TMR1IF -0-- -000 -0-- -000 TMR1IE xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu ---- -x-x ---- -u-u DT1CK ---- -1-1 ---- -1-1 TT1CK © 2005 Microchip Technology Inc. ...
Page 37
... NOTES: © 2005 Microchip Technology Inc. PIC16C712/716 DS41106B-page 35 ...
Page 38
... Figure 6 simplified block diagram of the Timer2 module. Additional information on timer modules is available in ® the PICmicro (DS33023). R/W-0 R/W-0 R/W-0 R/W-0 bit0 F /4 OSC 2 Mid-Range Reference Manual Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR Reset © 2005 Microchip Technology Inc. ...
Page 39
... PR2 Timer2 Period Register Legend unknown unchanged, — = unimplemented read as ‘0’. Shaded cells are not used by the Timer2 module. © 2005 Microchip Technology Inc. 6.2 Timer2 Interrupt The Timer2 module has an 8-bit period register PR2. Timer2 increments from 00h until it matches PR2 and then resets to 00h on the next increment cycle ...
Page 40
... PIC16C712/716 NOTES: DS41106B-page 38 © 2005 Microchip Technology Inc. ...
Page 41
... Reserved bit; Do Not Use bit 0: TT1CK – Tri-state control bit for T1CKI pin 0 = T1CKI pin is an output 1 = T1CKI pin is an input © 2005 Microchip Technology Inc. Additional information on the CCP module is available in the PICmicro (DS33023). TABLE 7-1: CCP Mode Capture ...
Page 42
... EXAMPLE 7-1: CLRF CCP1CON MOVLW NEW_CAPT_PS MOVWF CCP1CON CCPR1L TMR1L CHANGING BETWEEN CAPTURE PRESCALERS ;Turn CCP module off ;Load the W reg with ; the new prescaler ; mode value and CCP ON ;Load CCP1CON with this ; value © 2005 Microchip Technology Inc. ...
Page 43
... PIE1 — ADIE Legend unknown unchanged, — = unimplemented read as ‘0’. Shaded cells are not used by Capture and Timer1. © 2005 Microchip Technology Inc. 7.2.1 CCP PIN CONFIGURATION The user must configure the RB3/CCP1 pin as the CCP output by clearing the TRISCCP<2> bit. ...
Page 44
... PWM period the CCP1 pin will not be cleared. For an example PWM period and duty cycle calcula- tion, see the PICmicro (DS33023). • OSC (TMR2 prescale value) Tosc • (TMR2 prescale value) F OSC ( ) F PWM log = bits log(2) ® Mid-Range Reference Manual, © 2005 Microchip Technology Inc. ...
Page 45
... PR2 Timer2 Module’s Period Register Legend unknown unchanged, — = unimplemented read as ‘0’. Shaded cells are not used by PWM and Timer2. © 2005 Microchip Technology Inc. PIC16C712/716 1.22 kHz 4.88 kHz 19.53 kHz 78.12 kHz 156.3 kHz 208.3 kHz 16 ...
Page 46
... PORTB<3> functions as normal I/O. PORTB<3> always reads ‘0’ when configured as input. If PORTB<3> is configured as output, reading PORTB<3> will read the data latch. Writing to PORTB<3> will always store the result in the data latch, but it does not drive the RB3/CCP1 pin. © 2005 Microchip Technology Inc. ...
Page 47
... Unimplemented: Read as ‘0’ bit 0: ADON: A/D On bit 1 = A/D converter module is operating 0 = A/D converter module is shutoff and consumes no operating current © 2005 Microchip Technology Inc. Additional information on the A/D module is available in the PICmicro (DS33023). The A/D module has three registers. These registers are: • ...
Page 48
... D 11x A = Analog input D = Digital I/O DS41106B-page 46 U-0 R/W-0 R/W-0 R/W-0 — PCFG2 PCFG1 PCFG0 RA1 RA2 RA3 V REF RA3 REF RA3 REF Readable bit W = Writable bit bit0 U = Unimplemented bit, read as ‘0’ Value at POR Reset © 2005 Microchip Technology Inc. ...
Page 49
... FIGURE 8-3: A/D BLOCK DIAGRAM A/D Converter V REF (Reference voltage) © 2005 Microchip Technology Inc. PIC16C712/716 1. Configure the A/D module: • Configure analog pins/voltage reference/ and digital I/O (ADCON1) • Select A/D input channel (ADCON0) • Select A/D conversion clock (ADCON0) • ...
Page 50
... LSb error is the maximum error allowed for the A/D to meet its specified accuracy Note: When the conversion is started, the hold- ing capacitor is disconnected from the ) SS input pin. ). The Sampling Switch leakage V = 0.6V T 500 see ACQ Mid-Range Reference Manual HOLD = DAC capacitance = 51 Sampling Switch (k ) © 2005 Microchip Technology Inc. ...
Page 51
... When device frequency is greater than 1 MHz, the RC A/D conversion clock source is recommended for Sleep operation only. 5: For extended voltage devices (LC), please refer to Electrical Specifications section. © 2005 Microchip Technology Inc. 8.3 Configuring Analog Port Pins The ADCON1 and TRISA registers control the opera- tion of the A/D port pins ...
Page 52
... PCFG2 PCFG1 Value on Value on all Bit 0 POR, other Resets BOR --xx xxxx --xu uuuu RA0 RBIF 0000 000x 0000 000u -0-- -000 xxxx xxxx uuuu uuuu — ADON 0000 00-0 0000 00-0 ---1 1111 ---1 1111 -0-- 0000 PCFG0 ---- -000 ---- -000 © 2005 Microchip Technology Inc. ...
Page 53
... Reset while the power supply stabilizes. With these two timers on-chip, most applications need no external Reset circuitry. © 2005 Microchip Technology Inc. PIC16C712/716 Sleep mode is designed to offer a very low-current Power-Down mode. The user can wake-up from Sleep through external Reset, Watchdog Timer Wake-up, or through an interrupt ...
Page 54
... CP0 CP1 CP0 — bit13 bit 13-8, 5-4: CP1:CP0: Code Protection bits Code Protection for 2K Program memory (PIC16C716 Programming code protection off 10 = 0400h-07FFh code protected 01 = 0200h-07FFh code protected 00 = 0000h-07FFh code protected bit 13-8, 5-4: Code Protection for 1K Program memory bits (PIC16C712) ...
Page 55
... FIGURE 9-3: EXTERNAL CLOCK INPUT OPERATION (HS OSC CONFIGURATION) OSC1 Clock from ext. system PIC16C7XX OSC2 Open © 2005 Microchip Technology Inc. TABLE 9-1: Ranges Tested: Mode XT 455 kHz 2.0 MHz 4.0 MHz HS 8.0 MHz 16.0 MHz These values are for design guidance only. See notes at bottom of page ...
Page 56
... A simplified block diagram of the on-chip Reset circuit is shown in Figure 9-6. The PICmicro microcontrollers have a MCLR noise 100 k filter in the MCLR Reset path. The filter will detect and ignore small pulses. It should be noted that a WDT Reset does not drive MCLR pin low. © 2005 Microchip Technology Inc. ...
Page 57
... MCLR from external capacitor C in the event of MCLR/V PP down due to Electrostatic Discharge (ESD) or Electrical Overstress (EOS). © 2005 Microchip Technology Inc. 9.5 Power-up Timer (PWRT) The Power-up Timer provides a fixed nominal time-out (parameter #33), on power-up only, from the POR. The Power-up Timer operates on an internal RC oscillator ...
Page 58
... Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin. FIGURE 9-7: BROWN-OUT SITUATIONS V DD Internal Reset V DD Internal Reset V DD Internal Reset DS41106B-page 56 PWRT See Table 9-3 for time-out situations. Enable PWRT BODEN Enable OST 72 ms < © 2005 Microchip Technology Inc. S Chip_Reset BOR V BOR V BOR ...
Page 59
... V is below a certain level DD such that 0. Internal Brown-out Reset should be disabled when using this circuit. 3: Resistors should be adjusted for the characteristics of the transistor. © 2005 Microchip Technology Inc. PIC16C712/716 FIGURE 9-10: EXTERNAL BROWN-OUT PROTECTION CIRCUIT MCP809 V DD bypass capacitor Vss V ...
Page 60
... Program STATUS Counter Register 000h 0001 1xxx 000h 000u uuuu 000h 0001 0uuu 000h 0000 1uuu uuu0 0uuu 000h 0001 1uuu ( uuu1 0uuu Wake-up from Sleep 1024T OSC OSC — PCON Register ---- --0x ---- --uu ---- --uu ---- --uu ---- --uu ---- --u0 ---- --uu © 2005 Microchip Technology Inc. ...
Page 61
... When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: See Table 9-5 for Reset value for specific condition any device Reset, these pins are configured as inputs. 5: This is the value that will be in the port output latch. © 2005 Microchip Technology Inc. PIC16C712/716 MCLR Resets WDT Reset ...
Page 62
... MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 9-13: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET DS41106B-page PWRT T OST T PWRT T OST T PWRT T OST © 2005 Microchip Technology Inc CASE CASE 2 DD ...
Page 63
... CCP1IF CCP1IE TMR2IF TMR2IE TMR1IF TMR1IE © 2005 Microchip Technology Inc. PIC16C712/716 The RB0/INT pin interrupt, the RB port change interrupt and the TMR0 overflow interrupt flags are contained in the INTCON register. The peripheral interrupt flags are contained in the Special Function Registers, PIR1 and PIR2. The corre- ...
Page 64
... Bank 0 ;Copy FSR to W ;Copy FSR from W to FSR_TEMP ;Restore PCLATH ;Move W into PCLATH ;Swap STATUS_TEMP register into W ;(sets bank to original state) ;Move W into STATUS register ;Swap W_TEMP ;Swap W_TEMP into W © 2005 Microchip Technology Inc. ...
Page 65
... OPTION_REG N/A Legend: Shaded cells are not used by the Watchdog Timer. Note 1: See Figure 9-1 for operation of these bits. © 2005 Microchip Technology Inc. PIC16C712/716 WDT time-out period values may be found in the Electrical Specifications section under T ter #31). Values for the WDT prescaler (actually a postscaler, but shared with the Timer0 prescaler) may be assigned using the OPTION_REG register ...
Page 66
... Sleep: 1. TMR1 interrupt. Timer1 must be operating as an asynchronous counter. 2. CCP Capture mode interrupt. 3. Special Event Trigger (Timer1 in Asynchronous mode using an external clock). Other peripherals cannot generate interrupts, since during Sleep, no on-chip clocks are present. DS41106B-page IHMC © 2005 Microchip Technology Inc. ...
Page 67
... Note: Microchip does not recommend code protecting windowed devices. © 2005 Microchip Technology Inc. PIC16C712/716 postscaler will not be cleared, the TO bit will not be set and PD bits will not be cleared. • If the interrupt occurs during or after the execu- tion of a SLEEP instruction, the device will imme- diately wake-up from Sleep ...
Page 68
... This also allows the most recent firmware or a custom firmware to be programmed. For complete details on serial programming, please refer to the In-Circuit Serial Programming™ (ICSP™) Guide, (DS30277). DS41106B-page 66 ™ be serially © 2005 Microchip Technology Inc. ...
Page 69
... Byte-oriented operations • Bit-oriented operations • Literal and control operations © 2005 Microchip Technology Inc. PIC16C712/716 All instructions are executed within one single instruc- tion cycle, unless a conditional test is true or the pro- gram counter is changed as a result of an instruction. ...
Page 70
... TO 00 0000 0110 0011 1 C,DC,Z 11 110x kkkk kkkk 1010 kkkk kkkk © 2005 Microchip Technology Inc. Notes 1,2 1,2 2 1,2 1,2 1,2,3 1,2 1,2,3 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1,2 1 ...
Page 71
... PICSTART Plus Development Programmer - MPLAB PM3 Device Programmer • Low-Cost Demonstration and Development Boards and Evaluation Kits © 2005 Microchip Technology Inc. PIC16C712/716 11.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market ...
Page 72
... MPLAB C18 and MPLAB C30 C Compilers, and the MPASM and MPLAB ASM30 Assemblers. The software simulator offers the flexibility to develop and debug code outside of the laboratory environment, making it an excellent, economical software development tool. ® DSCs on an © 2005 Microchip Technology Inc. ...
Page 73
... The PC platform and Microsoft Windows 32-bit operating system were chosen to best make these features available in a simple, unified application. © 2005 Microchip Technology Inc. PIC16C712/716 11.9 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD ...
Page 74
... SEEVAL evaluation system, Sigma-Delta ADC, flow rate sensing, plus many more. Check the Microchip web page (www.microchip.com) and the latest “Product Selector Guide” (DS00148) for the complete list of demonstration, development and evaluation kits. © 2005 Microchip Technology Inc. ® ...
Page 75
... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2005 Microchip Technology Inc. (except V , MCLR, and RA4) ......................................... -0. (Note 2) ...
Page 76
... Note 1: The shaded region indicates the permissible combinations of voltage and frequency. FIGURE 12-2: PIC16LC712/716 VOLTAGE-FREQUENCY GRAPH, 0°C < TA < +70°C 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2.0 0 Note 1: The shaded region indicates the permissible combinations of voltage and frequency. DS41106B-page Frequency (MHz Frequency (MHz © 2005 Microchip Technology Inc. ...
Page 77
... I measurement This is the voltage where the device enters the Brown-out Reset. When BOR is enabled, the device will operate correctly to this trip point. © 2005 Microchip Technology Inc. Standard Operating Conditions (unless otherwise stated) Operating temperature Min. Typ† Max. Units 4.0 — ...
Page 78
... OSC DD LP osc mode kHz 3.0V, WDT disabled OSC 3.0V, WDT enabled 3.0V, WDT disabled + 3.0V, WDT disabled WDTE bit set 4.0V DD BODEN bit set 5.0V DD All temperatures All temperatures All temperatures All temperatures , DD and © 2005 Microchip Technology Inc. ...
Page 79
... PICmicro be driven with external clock in RC mode. 2: The leakage current on the MCLR/V levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as current sourced by the pin. © 2005 Microchip Technology Inc. PIC16C712/716 Standard Operating Conditions (unless otherwise stated) Operating temperature 0°C -40° ...
Page 80
... A Conditions I = 8.5 mA 4. 7.0 mA 4.5V - +125 1.6 mA 4. 1.2 mA 4.5V - +125 -3.0 mA 4. -2.5 mA 4.5V - +125 -1.3 mA 4. -1.0 mA 4.5V - +125 C RA4 pin In XT, HS and LP modes when external clock is used to drive OSC1. © 2005 Microchip Technology Inc. ...
Page 81
... Lowercase letters (pp) and their meanings CCP1 ck CLKOUT SDI do SDO dt Data in io I/O port mc MCLR Uppercase letters and their meanings Fall H High I Invalid (High-impedance) L Low © 2005 Microchip Technology Inc. PIC16C712/716 T Time osc OSC1 SCK T0CKI t1 T1CKI Period R Rise V Valid Z High-impedance DS41106B-page 79 ...
Page 82
... A -40°C T +85°C A -40°C T +125°C A range as described in DC spec Section 12.1 “DC Characteristics: DD Load condition Pin Legend 464 for all pins except OSC2/CLKOUT for OSC2 output for commercial for industrial for extended © 2005 Microchip Technology Inc. ...
Page 83
... All devices are tested to operate at “min.” values with an external clock applied to the OSC1/CLKIN pin. When an external clock input is used, the “Max.” cycle time limit is “DC” (no clock) for all devices. © 2005 Microchip Technology Inc ...
Page 84
... Units Conditions 75 200 ns Note 1 75 200 ns Note 1 35 100 ns Note 1 35 100 ns Note 1 — 0. Note 1 CY — — ns Note 1 — — ns Note 1 50 150 ns — — ns — — ns — — — — — — ns — — © 2005 Microchip Technology Inc. ...
Page 85
... T Brown-out Reset Pulse Width BOR * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. © 2005 Microchip Technology Inc. PIC16C712/716 Min. ...
Page 86
... N = prescale value (2, 4,..., 256) — ns Must also meet parameter 47 — ns — ns — ns — ns — ns Must also meet parameter 47 — ns — ns — ns — ns — prescale value ( prescale value ( — ns — ns 200 kHz 7Tosc — © 2005 Microchip Technology Inc. ...
Page 87
... TccF CCP1 output fall time * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. © 2005 Microchip Technology Inc. PIC16C712/716 Min Typ† ...
Page 88
... V £ AIN REF + 0 0.3 V 10.0 k — A Average current consump- tion when A/D is on. — A (Note 1) 1000 A During V acquisition. AIN Based on differential charge HOLD AIN C , see Section 9.1 HOLD “Configuration Bits” During A/D Conversion cycle © 2005 Microchip Technology Inc. ...
Page 89
... Data in “Typ” column unless otherwise stated. These parameters are for design guidance only and are not tested. : § This specification ensured by design. Note 1: ADRES register may be read on the following T 2: See Section 9.1 “Configuration Bits” for min. conditions. © 2005 Microchip Technology Inc. (1) 131 130 7 ...
Page 90
... PIC16C712/716 NOTES: DS41106B-page 88 © 2005 Microchip Technology Inc. ...
Page 91
... For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. © 2005 Microchip Technology Inc. Example PIC16C716-04/P Example XXXXXXXX XXXXXXXX ...
Page 92
... L p MILLIMETERS MIN NOM MAX 18 2.54 3.56 3.94 4.32 2.92 3.30 3.68 0.38 7.62 7.94 8.26 6.10 6.35 6.60 22.61 22.80 22.99 3.18 3.30 3.43 0.20 0.29 0.38 1.14 1.46 1.78 0.36 0.46 0.56 7.87 9.40 10. © 2005 Microchip Technology Inc. ...
Page 93
... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-013 Drawing No. C04-051 © 2005 Microchip Technology Inc Units INCHES* ...
Page 94
... Microchip Technology Inc. ...
Page 95
... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MO-150 Drawing No. C04-072 © 2005 Microchip Technology Inc. PIC16C712/716 Units ...
Page 96
... PIC16C712/716 NOTES: DS41106B-page 94 © 2005 Microchip Technology Inc. ...
Page 97
... Reset of all registers is revisited. Five different Reset (and wake-up) types are recognized. Registers are reset differently. 10. Wake-up from Sleep through interrupt is added. © 2005 Microchip Technology Inc. PIC16C712/716 11. Two separate timers, Oscillator Start-up Timer (OST) and Power-up Timer (PWRT) are included for more reliable power-up. These timers are invoked selectively to avoid unneces- sary delays on power-up and wake-up ...
Page 98
... PIC16C712/716 NOTES: DS41106B-page 96 © 2005 Microchip Technology Inc. ...
Page 99
... Timer1 Mode Selection .............................................. 40 Capture/Compare/PWM (CCP).......................................... 39 Capture Mode. See Capture CCP1CON Register ............................................. 11, 39 CCPR1H Register................................................ 11, 39 CCPR1L Register ................................................ 11, 39 Compare Mode. See Compare © 2005 Microchip Technology Inc. PIC16C712/716 Enable (CCP1IE Bit).................................................. 16 Flag (CCP1IF Bit) ...................................................... 17 PWM Mode. See PWM Timer Resources ....................................................... 39 Timing Diagram ......................................................... 85 CCP1CON Register ...
Page 100
... PORTB Register .................................................. 11, 23 Pull-up Enable (RBPU Bit)......................................... 14 RB0/INT Edge Select (INTEDG Bit) .......................... 14 RB0/INT Pin, External................................................ 62 RB3:RB0 Port Pins .................................................... 23 RB7:RB4 Interrupt-on-Change .................................. 62 RB7:RB4 Interrupt-on-Change Enable (RBIE Bit) 15, 62 RB7:RB4 Interrupt-on-Change Flag (RBIF Bit)............................................... 15, 24, 62 RB7:RB4 Port Pins .................................................... 26 TRISB Register.................................................... 12, 23 © 2005 Microchip Technology Inc. ...
Page 101
... Reader Response ............................................................ 104 Register File ....................................................................... 10 Register File Map ............................................................... 10 Reset ............................................................................ 51, 54 Block Diagram............................................................ 56 © 2005 Microchip Technology Inc. PIC16C712/716 Brown-out Reset (BOR). See Brown-out Reset (BOR) MCLR Reset. See MCLR Power-on Reset (POR). See Power-on Reset (POR) Reset Conditions for All Registers............................. 59 Reset Conditions for PCON Register ...
Page 102
... Watchdog Timer (WDT)............................................... 51, 63 Block Diagram ........................................................... 63 Enable (WDTE Bit) .............................................. 52, 63 Postscaler. See Postscaler, WDT Programming Considerations .................................... 63 RC Oscillator.............................................................. 63 Time-out Period ......................................................... 63 Timing Diagram ......................................................... 83 WDT Reset, Normal Operation ...................... 54, 58, 59 WDT Reset, Sleep ......................................... 54, 58, 59 WWW Address ................................................................ 101 WWW, On-Line Support ...................................................... 3 © 2005 Microchip Technology Inc. ...
Page 103
... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2005 Microchip Technology Inc. CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • Distributor or Representative • ...
Page 104
... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS41106B-page 102 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS41106B © 2005 Microchip Technology Inc. ...
Page 105
... DD Note (Commercial) +85 C (Industrial) (Extended) PIC16C712/716 PIC16C716 – 04/P 301 = Commercial temp., V PDIP package, 4 MHz, normal limits, QTP DD pattern #301. PIC16LC712 – 04I/SO = Industrial temp., SOIC package, 200 kHz, Extended V limits. DD PIC16C712 – 20I/P = Industrial temp., PDIP package, 20MHz, normal V limits ...
Page 106
... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2005 Microchip Technology Inc. EUROPE Austria - Weis Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...